Invention Grant
US08417870B2 System and method of increasing addressable memory space on a memory board 有权
在存储器板上增加可寻址存储空间的系统和方法

  • Patent Title: System and method of increasing addressable memory space on a memory board
  • Patent Title (中): 在存储器板上增加可寻址存储空间的系统和方法
  • Application No.: US12504131
    Application Date: 2009-07-16
  • Publication No.: US08417870B2
    Publication Date: 2013-04-09
  • Inventor: Hyun LeeJayesh R. Bhakta
  • Applicant: Hyun LeeJayesh R. Bhakta
  • Applicant Address: US CA Irvine
  • Assignee: Netlist, Inc.
  • Current Assignee: Netlist, Inc.
  • Current Assignee Address: US CA Irvine
  • Main IPC: G06F12/00
  • IPC: G06F12/00 G06F13/00
System and method of increasing addressable memory space on a memory board
Abstract:
A load-reducing memory module includes a plurality of memory components such as DRAMs. The memory components are organized into sets or ranks such that they can be accessed simultaneously for the full data bit-width of the memory module. A plurality of load reducing switching circuits is used to drive data bits from a memory controller to the plurality of memory components. The load reducing switching circuits are also used to multiplex the data lines from the memory components and drive the data bits to the memory controller.
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