Invention Grant
US08445940B2 Source and drain feature profile for improving device performance
有权
源和漏功能配置文件,用于提高设备性能
- Patent Title: Source and drain feature profile for improving device performance
- Patent Title (中): 源和漏功能配置文件,用于提高设备性能
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Application No.: US13543943Application Date: 2012-07-09
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Publication No.: US08445940B2Publication Date: 2013-05-21
- Inventor: Ming-Huan Tsai , Hui Ouyang , Chun-Fai Cheng , Wei-Han Fan
- Applicant: Ming-Huan Tsai , Hui Ouyang , Chun-Fai Cheng , Wei-Han Fan
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L31/072
- IPC: H01L31/072

Abstract:
An integrated circuit device is disclosed. The disclosed device provides improved control over a surface proximity and tip depth of integrated circuit devices. An exemplary integrated circuit device disclosed herein has a surface proximity of about 1 nm to about 3 nm and a tip depth of about 5 nm to about 10 nm. The integrated circuit device having such surface proximity and tip depth includes an epi source feature and an epi drain feature defined by a first facet and a second facet of a substrate in a first direction, such as a {111} crystallographic plane of the substrate, and a third facet of the substrate in a second direction, such as a {100} crystallographic plane of the substrate.
Public/Granted literature
- US20120273847A1 INTEGRATED CIRCUIT DEVICE WITH WELL CONTROLLED SURFACE PROXIMITY AND METHOD OF MANUFACTURING SAME Public/Granted day:2012-11-01
Information query
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