发明授权
US08445940B2 Source and drain feature profile for improving device performance
有权
源和漏功能配置文件,用于提高设备性能
- 专利标题: Source and drain feature profile for improving device performance
- 专利标题(中): 源和漏功能配置文件,用于提高设备性能
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申请号: US13543943申请日: 2012-07-09
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公开(公告)号: US08445940B2公开(公告)日: 2013-05-21
- 发明人: Ming-Huan Tsai , Hui Ouyang , Chun-Fai Cheng , Wei-Han Fan
- 申请人: Ming-Huan Tsai , Hui Ouyang , Chun-Fai Cheng , Wei-Han Fan
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L31/072
- IPC分类号: H01L31/072
摘要:
An integrated circuit device is disclosed. The disclosed device provides improved control over a surface proximity and tip depth of integrated circuit devices. An exemplary integrated circuit device disclosed herein has a surface proximity of about 1 nm to about 3 nm and a tip depth of about 5 nm to about 10 nm. The integrated circuit device having such surface proximity and tip depth includes an epi source feature and an epi drain feature defined by a first facet and a second facet of a substrate in a first direction, such as a {111} crystallographic plane of the substrate, and a third facet of the substrate in a second direction, such as a {100} crystallographic plane of the substrate.
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