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US08446191B2 Phase locked loop with digital compensation for analog integration 有权
具有数字补偿的锁相环,用于模拟集成

Phase locked loop with digital compensation for analog integration
Abstract:
A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO).
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