A model for a circuit cell used in timing and signal integrity analysis in an integrated circuit design is automatically generated. A behavioral model, such as a gate current model is used in which the current in the circuit cell is determined as a function of the input voltage and the output voltage of the circuit cell as well as the history of at least one of the current, voltage, and charge values of the circuit cell. For example, the current in the circuit cell may be a function of the history of the current, which may be calculated incrementally using recursive convolution at each time step when using the model.