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US08493116B2 Clock delay circuit and delay locked loop including the same 有权
时钟延迟电路和延迟锁定环包括相同

Clock delay circuit and delay locked loop including the same
Abstract:
A digital delay line includes a plurality of delay cells therein. The delay line is configured to delay a periodic signal received at a first input thereof by passing the periodic signal through a selected number of the plurality of delay cells, in response to a discontinuous thermometer code that encodes the selected number. A code converter is provided, which includes a group bit decoder, a shared bit decoder and a code output cell array, which are collectively configured to generate the discontinuous thermometer code in response to a binary control code.
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