发明授权
- 专利标题: Method of manufacturing devices having vertical junction edge
- 专利标题(中): 制造具有垂直接合边缘的器件的方法
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申请号: US13336516申请日: 2011-12-23
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公开(公告)号: US08501602B2公开(公告)日: 2013-08-06
- 发明人: Fernando Gonzalez , Chandra Mouli
- 申请人: Fernando Gonzalez , Chandra Mouli
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Fletcher Yoder
- 主分类号: H01L21/425
- IPC分类号: H01L21/425
摘要:
Techniques for forming devices, such as transistors, having vertical junction edges. More specifically, shallow trenches are formed in a substrate and filled with an oxide. Cavities may be formed in the oxide and filled with a conductive material, such a doped polysilicon. Vertical junctions are formed between the polysilicon and the exposed substrate at the trench edges such that during a thermal cycle, the doped polysilicon will out-diffuse doping elements into the adjacent single crystal silicon advantageously forming a diode extension having desirable properties.
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