发明授权
US08502376B2 Wirebondless wafer level package with plated bumps and interconnects
有权
无铅晶圆级封装,带有电镀凸块和互连
- 专利标题: Wirebondless wafer level package with plated bumps and interconnects
- 专利标题(中): 无铅晶圆级封装,带有电镀凸块和互连
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申请号: US13101657申请日: 2011-05-05
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公开(公告)号: US08502376B2公开(公告)日: 2013-08-06
- 发明人: Zigmund R. Camacho , Dioscoro A. Merilo , Lionel Chien Hui Tay , Jose A. Caparas
- 申请人: Zigmund R. Camacho , Dioscoro A. Merilo , Lionel Chien Hui Tay , Jose A. Caparas
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC, Ltd.
- 当前专利权人: STATS ChipPAC, Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Patent Law Group: Atkins & Associates, P.C.
- 代理商 Robert D. Atkins
- 主分类号: H01L23/498
- IPC分类号: H01L23/498
摘要:
A semiconductor package includes a carrier strip having a die cavity and bump cavities. A semiconductor die is mounted in the die cavity of the carrier strip. In one embodiment, the semiconductor die is mounted using a die attach adhesive. In one embodiment, a top surface of the first semiconductor die is approximately coplanar with a top surface of the carrier strip proximate to the die cavity. A metal layer is disposed over the carrier strip to form a package bump and a plated interconnect between the package bump and a contact pad of the first semiconductor die. An underfill material is disposed in the die cavity between the first semiconductor die and a surface of the die cavity. A passivation layer is disposed over the first semiconductor die and exposes a contact pad of the first semiconductor die. An encapsulant is disposed over the carrier strip.
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