Invention Grant
US08524562B2 Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS device 有权
用于在非硅沟道MOS器件中降低费米能级引脚的方法

Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS device
Abstract:
A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the gate dielectric and further repairs defects. The methods further improve the MOS device characteristics such that a MOS device with a quantum well is created.
Information query
Patent Agency Ranking
0/0