Invention Grant
US08524597B2 Methods for forming planarized hermetic barrier layers and structures formed thereby
有权
用于形成平坦化的气密屏障层及由此形成的结构的方法
- Patent Title: Methods for forming planarized hermetic barrier layers and structures formed thereby
- Patent Title (中): 用于形成平坦化的气密屏障层及由此形成的结构的方法
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Application No.: US13276062Application Date: 2011-10-18
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Publication No.: US08524597B2Publication Date: 2013-09-03
- Inventor: Sean W. King , Hui Jae Yoo
- Applicant: Sean W. King , Hui Jae Yoo
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Forefront IP Lawgroup, PLLC
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise forming a conductive material in an interconnect opening within an interlayer dielectric material that is disposed on a substrate, forming a low density dielectric material on a surface of the dielectric layer and on a surface of the conductive material, and forming a high density dielectric barrier layer on the low density dielectric layer.
Public/Granted literature
- US20120122312A1 METHODS FOR FORMING PLANARIZED HERMETIC BARRIER LAYERS AND STRUCTURES FORMED THEREBY Public/Granted day:2012-05-17
Information query
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