发明授权
- 专利标题： Testable integrated circuit and test method therefor
- 专利标题（中）： 可测试的集成电路及其测试方法
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申请号： US13129107申请日： 2009-11-10
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公开(公告)号： US08531204B2公开(公告)日： 2013-09-10
- 发明人: Rinze Ida Mechtildis Peter Meijer , Luis Elvira Villagra
- 申请人： Rinze Ida Mechtildis Peter Meijer , Luis Elvira Villagra
- 申请人地址： NL Eindhoven
- 专利权人： NXP, B.V.
- 当前专利权人： NXP, B.V.
- 当前专利权人地址： NL Eindhoven
- 优先权： EP08105793 20081113
- 国际申请： PCT/IB2009/054980 WO 20091110
- 国际公布： WO2010/055462 WO 20100520
- 主分类号： H03K19/00
- IPC分类号： H03K19/00 ; H03K19/0175 ; H03L5/00
摘要：
Disclosed is an integrated circuit (200) comprising a plurality of cores (110, 110), at least some of the cores being located in different power domains (VDD1, VDD2), each core being surrounded by a test wrapper (220) comprising a plurality of wrapper cells (128, 230), wherein each of said test wrappers are located in a single power domain (VDD3) and each plurality of wrapper cells comprises wrapper output cells (230) each arranged to output a signal from its associated core, each of said wrapper output cells comprising an output level shifter (232, 240) for shifting the voltage of said signal to the voltage of the single power domain (VDD3). A method for testing such an IC and standard library cells for designing such an IC are also disclosed.
公开/授权文献
- US20110221502A1 TESTABLE INTEGRATED CIRCUIT AND TEST METHOD THEREFOR 公开/授权日：2011-09-15
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