Invention Grant
- Patent Title: Method of manufacturing transparent transistor with multi-layered structures
-
Application No.: US13792395Application Date: 2013-03-11
-
Publication No.: US08546198B2Publication Date: 2013-10-01
- Inventor: Min Ki Ryu , Chi Sun Hwang , Chun Won Byun , Hye Yong Chu , Kyoung Ik Cho
- Applicant: Electronics and Telecommunications Research Institute
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Rabin & Berdo, P.C.
- Priority: KR10-2008-0131647 20081222
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of manufacturing a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. The lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel.
Public/Granted literature
- US20130189815A1 METHOD OF MANUFACTURING TRANSPARENT TRANSISTOR WITH MULTI-LAYERED STRUCTURES Public/Granted day:2013-07-25
Information query
IPC分类: