发明授权
- 专利标题: Statistical clock cycle computation
- 专利标题(中): 统计时钟周期计算
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申请号: US13311832申请日: 2011-12-06
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公开(公告)号: US08560989B2公开(公告)日: 2013-10-15
- 发明人: Nathan Buck , Brian Dreibelbis , John P. Dubuque , Eric A. Foreman , James C. Gregerson , Peter A. Habitz , Jeffrey G. Hemmett , Debjit Sinha , Natesan Venkateswaran , Chandramouli Visweswariah , Michael H. Wood , Vladimir Zolotov
- 申请人: Nathan Buck , Brian Dreibelbis , John P. Dubuque , Eric A. Foreman , James C. Gregerson , Peter A. Habitz , Jeffrey G. Hemmett , Debjit Sinha , Natesan Venkateswaran , Chandramouli Visweswariah , Michael H. Wood , Vladimir Zolotov
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Roberts Mlotkowski Safran & Cole, P.C.
- 代理商 Richard Kotulak
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Systems and methods for statistical clock cycle computation and closing timing of an integrated circuit design to a maximum clock cycle or period. The method includes loading a design and timing model for at least one circuit path of an integrated circuit or a region of the integrated circuit into a computing device. The method further includes performing a statistical static timing analysis (SSTA) of the at least one circuit path using the loaded design and timing model to obtain slack canonical data. The method further includes calculating a maximum circuit clock cycle for the integrated circuit or the specified region of the integrated circuit in linear canonical form based upon the slack canonical data obtained from the SSTA.
公开/授权文献
- US20130145333A1 STATISTICAL CLOCK CYCLE COMPUTATION 公开/授权日:2013-06-06