Invention Grant
- Patent Title: Fabricating method of semiconductor package structure
- Patent Title (中): 半导体封装结构的制造方法
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Application No.: US13590847Application Date: 2012-08-21
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Publication No.: US08563363B2Publication Date: 2013-10-22
- Inventor: Tzyy-Jang Tseng , Chin-Sheng Wang , Chih-Hong Chuang
- Applicant: Tzyy-Jang Tseng , Chin-Sheng Wang , Chih-Hong Chuang
- Applicant Address: TW Hsinchu County
- Assignee: Subtron Technology Co., Ltd.
- Current Assignee: Subtron Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu County
- Agency: J.C. Patents
- Priority: TW99122521A 20100708
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A fabricating method of a semiconductor package structure is provided. A dielectric layer having a first surface and a second surface is provided. A patterned metal layer has been formed on the first surface of the dielectric layer. An opening going through the first and the second surfaces is formed. A carrier having a third surface and a fourth surface is formed at the second surface. A portion of the third surface is exposed by the opening of the dielectric layer. A semiconductor die having a joining surface and a side-surface is joined in the opening. At least a through hole going through the third and the fourth surfaces is formed. A metal layer having at least a heat conductive post extending from the fourth surface of the carrier to the through hole and disposed in the through hole and a containing cavity is formed on the fourth surface.
Public/Granted literature
- US20130011971A1 FABRICATING METHOD OF SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2013-01-10
Information query
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