- 专利标题: Transistor circuit, display panel and electronic apparatus
-
申请号: US11490239申请日: 2006-07-21
-
公开(公告)号: US08576144B2公开(公告)日: 2013-11-05
- 发明人: Mutsumi Kimura , Yojiro Matsueda , Tokuroh Ozawa , Michael Quinn
- 申请人: Mutsumi Kimura , Yojiro Matsueda , Tokuroh Ozawa , Michael Quinn
- 申请人地址: JP Tokyo
- 专利权人: Seiko Epson Corporation
- 当前专利权人: Seiko Epson Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Oliff & Berridge, PLC
- 优先权: JP10-69147 19980318
- 主分类号: G09G3/30
- IPC分类号: G09G3/30 ; G09G3/32 ; G09G5/00
摘要:
A transistor circuit is provided including a driving transistor where conductance between the source and the drain is controlled in response to a supplied voltage, and a compensating transistor where the gate is connected to one of the source and the drain, the compensating transistor being connected so as to supply input signals to the gate of the driving transistor through the source and drain. In a transistor circuit where conductance control in a driving transistor is carried out in response to the voltage of input signals, it is possible to control the conductance by using input signals of a relatively low voltage and a variance in threshold characteristics of driving transistors is compensated. With this transistor circuit, a display panel that can display picture images with reduced uneven brightness is achieved.
公开/授权文献
信息查询
IPC分类: