A semiconductor component and a method of manufacturing the semiconductor component that reduces parasitic elements. A semiconductor chip is coupled to a semiconductor chip receiving area of a support structure. The semiconductor chip has at least two power semiconductor devices. A drain contact of a first power semiconductor device is coupled to a source contact of a second power semiconductor device and the drain and source contacts of the first and second power semiconductor devices are joined to the semiconductor chip receiving area. Another semiconductor chip may be bonded to a second semiconductor chip receiving area of the support structure. An energy storage element may be coupled between the source contact of the first power semiconductor device and the drain contact of the second semiconductor device. A protective structure may be formed over the semiconductor chips and the energy storage element.