发明授权
- 专利标题: FinFET parasitic capacitance reduction using air gap
- 专利标题(中): 使用气隙对FinFET寄生电容进行减小
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申请号: US13617426申请日: 2012-09-14
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公开(公告)号: US08637384B2公开(公告)日: 2014-01-28
- 发明人: Takashi Ando , Josephine B. Chang , Sivananda K. Kanakasabapathy , Pranita Kulkarni , Theodorus E. Standaert , Tenko Yamashita
- 申请人: Takashi Ando , Josephine B. Chang , Sivananda K. Kanakasabapathy , Pranita Kulkarni , Theodorus E. Standaert , Tenko Yamashita
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Harrington & Smith
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/283
摘要:
Methods are disclosed to fabricate a transistor, for example a FinFET, by forming over a substrate at least one electrically conductive channel between a source region and a drain region; forming a gate structure to be disposed over a portion of the channel, the gate structure having a width and a length and a height defining two opposing sidewalls of the gate structure and being formed such that the channel said passes through the sidewalls; forming spacers on the sidewalls; forming a layer of epitaxial silicon over the channel; removing the spacers; and forming a dielectric layer to be disposed over the gate structure and portions of the channel that are external to the gate structure such that a capacitance-reducing air gap underlies the dielectric layer and is disposed adjacent to the sidewalls of said gate structure in a region formerly occupied by the spacers.
公开/授权文献
- US20130095629A1 Finfet Parasitic Capacitance Reduction Using Air Gap 公开/授权日:2013-04-18
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