A method of forming a SONOS gate structure. The method includes forming a gate pattern with sidewalls on a substrate, wherein the gate pattern includes a gate dielectric layer patterned on the substrate and a gate electrode patterned on the gate dielectric layer, forming a first oxide layer on the gate pattern and the substrate; etching back the first oxide layer to expose the substrate and the top of the gate electrode, leaving oxide spacers along the sidewalls of the gate pattern respectively; forming a second oxide layer on the substrate and the oxide spacers; and forming trapping dielectric spacers on the second oxide layer adjacent to the sidewalls of the gate pattern respectively.