发明授权
US08659139B2 Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
失效
使用组合中的重复信号端子的短截线最小化，而无需引线封装衬底
- 专利标题： Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
- 专利标题（中）： 使用组合中的重复信号端子的短截线最小化，而无需引线封装衬底
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申请号： US13439228申请日： 2012-04-04
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公开(公告)号： US08659139B2公开(公告)日： 2014-02-25
- 发明人: Richard Dewitt Crisp , Wael Zohni , Belgacem Haba , Frank Lambrecht
- 申请人： Richard Dewitt Crisp , Wael Zohni , Belgacem Haba , Frank Lambrecht
- 申请人地址： US CA San Jose
- 专利权人： Invensas Corporation
- 当前专利权人： Invensas Corporation
- 当前专利权人地址： US CA San Jose
- 代理机构： Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- 主分类号： H01L23/52
- IPC分类号： H01L23/52 ; H01L23/02 ; H01L23/48 ; H01L29/40 ; H01L23/04 ; H05K7/00 ; H05K1/18 ; H01L21/82
摘要：
A microelectronic assembly can include a circuit panel having first and second panel contacts at respective first and second surfaces thereof, and first and second microelectronic packages each having terminals mounted to the respective panel contacts. Each package can include a microelectronic element having a face and contacts thereon, a substrate having first and second surfaces, and terminals on the second surface configured for connecting the package with an external component. The terminals can include first terminals at positions within first and second parallel grids. The first terminals can be configured to carry address information usable by circuitry within the package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic element. Signal assignments of the first terminals in the first grid can be a mirror image of signal assignments of the first terminals in the second grid.
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