Invention Grant
US08675440B2 Method controlling deep power down mode in multi-port semiconductor memory
有权
在多端口半导体存储器中控制深度掉电模式的方法
- Patent Title: Method controlling deep power down mode in multi-port semiconductor memory
- Patent Title (中): 在多端口半导体存储器中控制深度掉电模式的方法
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Application No.: US13754950Application Date: 2013-01-31
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Publication No.: US08675440B2Publication Date: 2014-03-18
- Inventor: Ho-Cheol Lee , Jung-Bae Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2009-0049067 20090603
- Main IPC: G11C5/14
- IPC: G11C5/14
Abstract:
A method of controlling a deep power down mode in a multi-port semiconductor memory having a plurality of ports connected to a plurality of processors includes controlling the deep power down mode in the multi-port semiconductor memory such that activation/deactivation of the deep power down mode are determined in accordance with signals applied through various ports in the plurality of ports.
Public/Granted literature
- US20130142000A1 METHOD CONTROLLING DEEP POWER DOWN MODE IN MULTI-PORT SEMICONDUCTOR MEMORY Public/Granted day:2013-06-06
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