发明授权
US08698128B2 Gate-all around semiconductor nanowire FET's on bulk semicoductor wafers
有权
半导体纳米线FET围绕散装半导体晶圆的栅极
- 专利标题： Gate-all around semiconductor nanowire FET's on bulk semicoductor wafers
- 专利标题（中）： 半导体纳米线FET围绕散装半导体晶圆的栅极
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申请号： US13405682申请日： 2012-02-27
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公开(公告)号： US08698128B2公开(公告)日： 2014-04-15
- 发明人: Jeffrey W. Sleight , Josephine B. Chang , Isaac Lauer , Shreesh Narasimha
- 申请人： Jeffrey W. Sleight , Josephine B. Chang , Isaac Lauer , Shreesh Narasimha
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Scully, Scott, Murphy & Presser, P.C.
- 代理商 H. Daniel Schnurmann
- 主分类号： H01L29/775
- IPC分类号： H01L29/775
摘要：
Non-planar semiconductor devices are provided that include at least one semiconductor nanowire suspended above a semiconductor oxide layer that is present on a first portion of a bulk semiconductor substrate. An end segment of the at least one semiconductor nanowire is attached to a first semiconductor pad region and another end segment of the at least one semiconductor nanowire is attached to a second semiconductor pad region. The first and second pad regions are located above and are in direct contact with a second portion of the bulk semiconductor substrate which is vertically offsets from the first portion. The structure further includes a gate surrounding a central portion of the at least one semiconductor nanowire, a source region located on a first side of the gate, and a drain region located on a second side of the gate which is opposite the first side of the gate.