发明授权
- 专利标题： Methods of containing defects for non-silicon device engineering
- 专利标题（中）： 包含非硅器件工程缺陷的方法
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申请号： US13631417申请日： 2012-09-28
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公开(公告)号： US08716751B2公开(公告)日： 2014-05-06
- 发明人: Niti Goel , Ravi Pillarisetty , Niloy Mukherjee , Robert S. Chau , Willy Rachmady , Matthew V. Metz , Van H. Le , Jack T. Kavalieros , Marko Radosavljevic , Benjamin Chu-Kung , Gilbert Dewey , Seung Hoon Sung
- 申请人： Niti Goel , Ravi Pillarisetty , Niloy Mukherjee , Robert S. Chau , Willy Rachmady , Matthew V. Metz , Van H. Le , Jack T. Kavalieros , Marko Radosavljevic , Benjamin Chu-Kung , Gilbert Dewey , Seung Hoon Sung
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： H01L21/02
- IPC分类号： H01L21/02
摘要：
An apparatus including a device including a channel material having a first lattice structure on a well of a well material having a matched lattice structure in a buffer material having a second lattice structure that is different than the first lattice structure. A method including forming a trench in a buffer material; forming an n-type well material in the trench, the n-type well material having a lattice structure that is different than a lattice structure of the buffer material; and forming an n-type transistor. A system including a computer including a processor including complimentary metal oxide semiconductor circuitry including an n-type transistor including a channel material, the channel material having a first lattice structure on a well disposed in a buffer material having a second lattice structure that is different than the first lattice structure, the n-type transistor coupled to a p-type transistor.