发明授权
- 专利标题: Signal interpolation device and parallel A/D converting device
- 专利标题(中): 信号插值装置和并行A / D转换装置
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申请号: US13717410申请日: 2012-12-17
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公开(公告)号: US08723713B2公开(公告)日: 2014-05-13
- 发明人: Junya Matsuno , Tetsuro Itakura
- 申请人: Junya Matsuno , Tetsuro Itakura
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Holtz, Holtz, Goodman & Chick, PC
- 优先权: JP2012-24184 20120207
- 主分类号: H03M1/36
- IPC分类号: H03M1/36
摘要:
There is provided a signal interpolation device, including: a first amplifier to generate a first signal representing a difference between an input signal and a first reference voltage; a second amplifier to generate a second signal representing a difference between the input signal and a second reference voltage; a first output amplifier to amplify the first signal to generate a first output signal; a second output amplifier to amplify the second signal to generate a second output signal; a third output amplifier to amplify a sum of a first interpolation signal and the first signal to generate a third output signal, the first interpolation signal representing a voltage generated by dividing a difference between the first reference voltage and the second reference voltage by “2^n”; and a fourth output amplifier to amplify a difference between the second signal and the first interpolation signal to generate a fourth output signal.
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