公开(公告)号：US08797205B2

公开(公告)日：2014-08-05

申请号：US13413793

申请日：2012-03-07

申请人： Masanori Furuta ,  Tetsuro Itakura

发明人： Masanori Furuta ,  Tetsuro Itakura

IPC分类号： H03M1/12

CPC分类号： H03M1/164 ,  H03M1/466

摘要： This A/D convertor includes: a first D/A conversion unit configured to sample an analog input signal, and to generate a first difference signal by performing successive comparison of the analog input signal based on a reference voltage; a precharge capacitor unit configured to hold the reference voltage; a first comparing unit configured to compare the first difference signal with a reference value to generate a first digital signal; and an amplifying unit configured to calculate by using the first difference signal and the reference voltage to generate a residual signal.

摘要翻译： 该A / D转换器包括：第一D / A转换单元，被配置为对模拟输入信号进行采样，并且通过基于参考电压执行模拟输入信号的连续比较来产生第一差分信号; 配置为保持所述参考电压的预充电电容器单元; 第一比较单元，被配置为将所述第一差分信号与参考值进行比较，以产生第一数字信号; 以及放大单元，被配置为通过使用第一差分信号和参考电压来计算以产生残留信号。

公开(公告)号：US08723713B2

公开(公告)日：2014-05-13

申请号：US13717410

申请日：2012-12-17

申请人： Junya Matsuno ,  Tetsuro Itakura

发明人： Junya Matsuno ,  Tetsuro Itakura

IPC分类号： H03M1/36

CPC分类号： H03H11/22 ,  H03M1/204 ,  H03M1/205 ,  H03M1/36 ,  H03M1/365

摘要： There is provided a signal interpolation device, including: a first amplifier to generate a first signal representing a difference between an input signal and a first reference voltage; a second amplifier to generate a second signal representing a difference between the input signal and a second reference voltage; a first output amplifier to amplify the first signal to generate a first output signal; a second output amplifier to amplify the second signal to generate a second output signal; a third output amplifier to amplify a sum of a first interpolation signal and the first signal to generate a third output signal, the first interpolation signal representing a voltage generated by dividing a difference between the first reference voltage and the second reference voltage by “2^n”; and a fourth output amplifier to amplify a difference between the second signal and the first interpolation signal to generate a fourth output signal.

摘要翻译： 提供了一种信号插值装置，包括：第一放大器，用于产生表示输入信号和第一参考电压之间的差的第一信号; 第二放大器，用于产生表示所述输入信号和第二参考电压之间的差的第二信号; 第一输出放大器，用于放大第一信号以产生第一输出信号; 第二输出放大器，用于放大第二信号以产生第二输出信号; 第三输出放大器，用于放大第一内插信号和第一信号的和以产生第三输出信号，第一内插信号表示通过将第一参考电压和第二参考电压之差除以“2 ^ n“; 以及第四输出放大器，用于放大第二信号和第一内插信号之间的差以产生第四输出信号。

公开(公告)号：US20130249517A1

公开(公告)日：2013-09-26

申请号：US13692010

申请日：2012-12-03

申请人： Kei SHIRAISHI ,  Takeshi UENO ,  Taichi OGAWA ,  Tetsuro ITAKURA

发明人： Kei SHIRAISHI ,  Takeshi UENO ,  Taichi OGAWA ,  Tetsuro ITAKURA

IPC分类号： G05F1/46

CPC分类号： G05F1/468 ,  H02M3/157 ,  H02M2003/1566

摘要： A control circuit of a DC-DC converter has a voltage difference signal generator configured to generate a digital voltage difference signal depending on a voltage difference between the output voltage and a reference voltage, a PID controller configured to generate a digital PID signal for determining the duty ratio of the pulse-width modulated signal, based on the digital voltage difference signal, a phase controller configured to generate a digital phase control signal for determining a phase of the pulse-width modulated signal, based on the digital voltage difference signal, and a PWM generator configured to generate the pulse-width modulated signal, based on the digital PID signal and the digital phase control signal.

摘要翻译： DC-DC转换器的控制电路具有：电压差信号发生器，被配置为根据输出电压和参考电压之间的电压差产生数字电压差信号; PID控制器，被配置为产生数字PID信号，用于确定 基于数字电压差信号的脉宽调制信号的占空比;相位控制器，被配置为基于数字电压差信号产生用于确定脉宽调制信号的相位的数字相位控制信号;以及 PWM发生器，被配置为基于数字PID信号和数字相位控制信号来产生脉宽调制信号。

公开(公告)号：US08410762B2

公开(公告)日：2013-04-02

申请号：US13306119

申请日：2011-11-29

申请人： Takeshi Ueno ,  Tetsuro Itakura

发明人： Takeshi Ueno ,  Tetsuro Itakura

IPC分类号： G05F1/613 ,  G05F1/40

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： The high-side switch has one end connected to the input terminal. The low-side switch has one end connected to other end of the high-side switch and other end connected to a ground terminal. The inductor has one end connected to the other end of the high-side switch and other end connected to the output terminal. The capacitor has one end connected to the other end of the inductor and other end connected to the ground terminal. The high-side switch controlling circuit generates and supplies a high-side switch controlling signal based on a target voltage of the output terminal, the output voltage of the output terminal, and a current flowing through the capacitor, to the high-side switch. The low-side switch controlling circuit generates and supplies a low-side switch controlling signal based on the high-side switch controlling signal and a current flowing through the inductor, to the low-side switch.

摘要翻译： 高边开关的一端连接到输入端。 低侧开关的一端连接到高侧开关的另一端，另一端连接到接地端子。 电感器的一端连接到高侧开关的另一端，另一端连接到输出端子。 电容器的一端连接到电感器的另一端，另一端连接到接地端子。 高侧开关控制电路基于输出端子的目标电压，输出端子的输出电压和流过电容器的电流产生并提供高侧开关控制信号到高侧开关。 低侧开关控制电路基于高侧开关控制信号和流过电感器的电流产生并提供低侧开关控制信号到低侧开关。

公开(公告)号：US07865163B2

公开(公告)日：2011-01-04

申请号：US12407442

申请日：2009-03-19

申请人： Osamu Watanabe ,  Rui Ito ,  Shigehito Saigusa ,  Tetsuro Itakura

发明人： Osamu Watanabe ,  Rui Ito ,  Shigehito Saigusa ,  Tetsuro Itakura

IPC分类号： H04B1/10

CPC分类号： H03H11/1291

摘要： A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

摘要翻译： 时间常数自动调整电路包括：滤波器电路，改变输入时钟信号的相位以输出时钟信号; 相位比较电路，将滤波器电路的输出信号的相位与时钟信号的相位进行比较，并且当输出信号的相位和时钟信号的相位相同时输出预定电压; 至少三个比较器将输出电压与多个不同电压进行比较; 根据比较器的输出结果，计数至少三个不同电压中的任何一个的输出位的数量的递减计数器; 以及控制电路根据由升降计数器计数的输出位数来改变滤波电路的时间常数。

公开(公告)号：US20100237829A1

公开(公告)日：2010-09-23

申请号：US12726828

申请日：2010-03-18

申请人： Yoshinao TATEBAYASHI ,  Shoji Otaka ,  Tetsuro Itakura ,  Norio Takami

发明人： Yoshinao TATEBAYASHI ,  Shoji Otaka ,  Tetsuro Itakura ,  Norio Takami

IPC分类号： H02J7/00

CPC分类号： H02J7/0026 ,  H01M4/661 ,  H01M10/052 ,  H01M10/425 ,  H01M10/441 ,  H01M10/482 ,  Y02T10/7055

摘要： An assembled battery system includes an assembled battery including a plurality of electric cell blocks connected in series, the electric cell blocks each including at least one nonaqueous electrolyte secondary battery provided with a negative electrode current collector formed of aluminum or an aluminum alloy, a voltage measuring unit configured to measure a plurality of voltages of the electric cell blocks, a controller which controls charge/discharge of the assembled battery in accordance with the measured voltages, and bypass circuits connected in parallel to the electric cell blocks, the bypass circuits each bypassing a current that flows from a negative electrode of one of the electric cell blocks to a positive electrode of the one of electric cell blocks when the measured voltage of the one of electric cell blocks is a negative value not greater than a threshold value.

摘要翻译： 组合电池系统包括：串联连接的多个电池块的组电池，每个电池块包括至少一个设置有由铝或铝合金形成的负极集电体的非水电解质二次电池，电压测量 被配置为测量电池单元块的多个电压的单元，根据测量的电压控制组电池的充电/放电的控制器，以及与电池块并联连接的旁路电路，旁路电路绕过 当一个电池块的测量电压为不大于阈值的负值时，电流从电池单元块中的一个的负极流向电池单元块中的一个的正极。

公开(公告)号：US20100079146A1

公开(公告)日：2010-04-01

申请号：US12406534

申请日：2009-03-18

申请人： Daisuke KUROSE ,  Hiroki SAKURAI ,  Tetsuro ITAKURA ,  Yoshinao TATEBAYASHI ,  Nobuo SHIBUYA ,  Toshiyuki UMEDA

发明人： Daisuke KUROSE ,  Hiroki SAKURAI ,  Tetsuro ITAKURA ,  Yoshinao TATEBAYASHI ,  Nobuo SHIBUYA ,  Toshiyuki UMEDA

IPC分类号： G01N27/416

CPC分类号： G01R31/3658 ,  B60L3/0046 ,  B60L11/1864 ,  B60L2240/545 ,  B60L2240/547 ,  B60L2240/549 ,  G01R31/362 ,  H01M10/425 ,  H01M10/482 ,  H01M10/486 ,  Y02T10/7005 ,  Y02T10/7061 ,  Y02T90/16

摘要： There is an apparatus includes a voltage acquiring unit which acquires an inter-terminal voltage of the battery cell; a battery information acquiring circuit which acquires battery information of the battery cell with the acquired voltage being supplied as a power supply voltage and; a transformer configured to have a primary winding and a secondary winding, the primary winding being connected to a common wire; a communication circuit which transmits a signal of the battery information to a management unit, supplied with the acquired voltage as a power supply voltage; a rectification circuit which rectifies a signal of a predetermined frequency from the management unit to generate a DC voltage; and a control circuit which controls the supply of the power supply voltages to the battery information acquiring circuit and the communication circuit, the control circuit being supplied with the DC voltage as a power supply voltage.

摘要翻译： 存在一种装置，包括获取电池单元的端子间电压的电压获取单元; 电池信息获取电路，其获取所获取的电压作为电源电压的电池信息; 被配置为具有初级绕组和次级绕组的变压器，所述初级绕组连接到公共线; 将电池信息的信号发送到管理单元的通信电路，提供所获取的电压作为电源电压; 整流电路，其从所述管理单元整流预定频率的信号，以产生DC电压; 以及控制电路，其控制对电池信息获取电路和通信电路的电源电压的供给，所述控制电路被提供有直流电压作为电源电压。

公开(公告)号：US20090184857A1

公开(公告)日：2009-07-23

申请号：US12349180

申请日：2009-01-06

申请人： Masanori Furuta ,  Tomohiko Ito ,  Takafumi Yamaji ,  Tetsuro Itakura

发明人： Masanori Furuta ,  Tomohiko Ito ,  Takafumi Yamaji ,  Tetsuro Itakura

IPC分类号： H03M1/12

CPC分类号： H03M1/1215 ,  H03M1/162 ,  H03M1/164 ,  H03M1/468

摘要： An A/D converting apparatus includes a first A/D converter to sample an analog input signal having a D/A converter to generate a comparative signal for successive comparison with the analog input signal, a signal generator generate a differential signal between the analog input signal and the comparative signal, and a comparator to compare the comparative signal with a standard value to generate a first digital signal exhibiting high-order bit; an amplifier to amplify the differential signal to generate a residue signal; and a second A/D converter to sample the residue signal to generate a second digital signal exhibiting low-order bit.

摘要翻译： A / D转换装置包括：第一A / D转换器，对具有D / A转换器的模拟输入信号进行采样以产生用于与模拟输入信号连续比较的比较信号，信号发生器在模拟输入端之间产生差分信号 信号和比较信号，以及比较器，用于将比较信号与标准值进行比较，以产生呈现高位的第一数字信号; 放大器，用于放大差分信号以产生残留信号; 以及第二A / D转换器，用于对残留信号进行采样以产生呈现低阶位的第二数字信号。

公开(公告)号：US20090179696A1

公开(公告)日：2009-07-16

申请号：US12407442

申请日：2009-03-19

申请人： Osamu WATANABE ,  Rui ITO ,  Shigehito SAIGUSA ,  Tetsuro ITAKURA

发明人： Osamu WATANABE ,  Rui ITO ,  Shigehito SAIGUSA ,  Tetsuro ITAKURA

IPC分类号： H03K5/00

CPC分类号： H03H11/1291

摘要： A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

摘要翻译： 时间常数自动调整电路包括：滤波器电路，改变输入时钟信号的相位以输出时钟信号; 相位比较电路，将滤波器电路的输出信号的相位与时钟信号的相位进行比较，并且当输出信号的相位和时钟信号的相位相同时输出预定电压; 至少三个比较器将输出电压与多个不同电压进行比较; 根据比较器的输出结果，计数至少三个不同电压中的任何一个的输出位的数量的递减计数器; 以及控制电路根据由升降计数器计数的输出位数来改变滤波电路的时间常数。

公开(公告)号：US20090045995A1

公开(公告)日：2009-02-19

申请号：US12175209

申请日：2008-07-17

申请人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

发明人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

IPC分类号： H03M1/34

CPC分类号： H03K5/2481 ,  H03K5/249

摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.

摘要翻译： 比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子 信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。