Invention Grant
- Patent Title: Apparatus and method for high voltage MOS transistor
- Patent Title (中): 高压MOS晶体管的装置和方法
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Application No.: US13410135Application Date: 2012-03-01
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Publication No.: US08766357B2Publication Date: 2014-07-01
- Inventor: Chao-Wei Tseng , Kun-Ming Huang , Cheng-Chi Chuang , Fu-Hsiung Yang
- Applicant: Chao-Wei Tseng , Kun-Ming Huang , Cheng-Chi Chuang , Fu-Hsiung Yang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A high voltage MOS transistor comprises a first drain/source region formed over a substrate, a second drain/source region formed over the substrate and a first metal layer formed over the substrate. The first metal layer comprises a first conductor coupled to the first drain/source region through a first metal plug, a second conductor coupled to the second drain/source region through a second metal plug and a plurality of floating metal rings formed between the first conductor and the second conductor. The floating metal rings help to improve the breakdown voltage of the high voltage MOS transistor.
Public/Granted literature
- US20130228873A1 Apparatus and Method for High Voltage MOS Transistor Public/Granted day:2013-09-05
Information query
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