Invention Grant
- Patent Title: Methods for protecting electronic circuits operating under high stress conditions
- Patent Title (中): 保护在高应力条件下工作的电子电路的方法
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Application No.: US13966938Application Date: 2013-08-14
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Publication No.: US08772091B2Publication Date: 2014-07-08
- Inventor: Javier A Salcedo , David Hall Whitney
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L21/8222
- IPC: H01L21/8222

Abstract:
Apparatus and methods for electronic circuit protection under high stress operating conditions are provided. In one embodiment, an apparatus includes a substrate having a first p-well, a second p-well adjacent the first p-well, and an n-type region separating the first and second p-wells. An n-type active area is over the first p-well and a p-type active area is over the second p-well. The n-type and p-type active areas are electrically connected to a cathode and anode of a high reverse blocking voltage (HRBV) device, respectively. The n-type active area, the first p-well and the n-type region operate as an NPN bipolar transistor and the second p-well, the n-type region, and the first p-well operate as a PNP bipolar transistor. The NPN bipolar transistor defines a relatively low forward trigger voltage of the HRBV device and the PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device.
Public/Granted literature
- US20130330884A1 METHODS FOR PROTECTING ELECTRONIC CIRCUITS OPERATING UNDER HIGH STRESS CONDITIONS Public/Granted day:2013-12-12
Information query
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