Invention Grant
- Patent Title: Semiconductor structures and fabrication methods including trench filling
- Patent Title (中): 半导体结构和制造方法,包括沟槽填充
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Application No.: US13652812Application Date: 2012-10-16
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Publication No.: US08779423B2Publication Date: 2014-07-15
- Inventor: Jiquan Liu , Shengan Xiao , Wei Ji
- Applicant: Jiquan Liu , Shengan Xiao , Wei Ji
- Applicant Address: CN Shanghai
- Assignee: Shanghai Hua Hong Nec Electronics Company, Limited
- Current Assignee: Shanghai Hua Hong Nec Electronics Company, Limited
- Current Assignee Address: CN Shanghai
- Agency: Anova Law Group, PLLC
- Priority: CN201110337812 20111031
- Main IPC: H01L29/04
- IPC: H01L29/04

Abstract:
A method is provided for fabricating a semiconductor structure. The method includes providing a semiconductor substrate, forming an epitaxial layer on a top surface of the semiconductor substrate and having a predetermined thickness, and forming a plurality of trenches in the epitaxial layer. The trenches are formed in the epitaxial layer and have a predetermined depth, top width, and bottom width. Further, the method includes performing a first trench filling process to form a semiconductor layer inside of the trenches using a mixture gas containing at least silicon source gas and halogenoid gas, stopping the first trench filling process when at least one trench is not completely filled, and performing a second trench filling process, different from the first trench filling process, to fill the plurality of trenches completely.
Public/Granted literature
- US20130105796A1 SEMICONDUCTOR STRUCTURES AND FABRICATION METHOD Public/Granted day:2013-05-02
Information query
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