发明授权
- 专利标题: Low-voltage semiconductor memory
- 专利标题(中): 低压半导体存储器
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申请号: US13816718申请日: 2011-08-14
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公开(公告)号: US08787075B2公开(公告)日: 2014-07-22
- 发明人: Masahiko Yoshimoto , Hiroshi Kawaguchi , Yohei Nakata , Shunsuke Okumura
- 申请人: Masahiko Yoshimoto , Hiroshi Kawaguchi , Yohei Nakata , Shunsuke Okumura
- 申请人地址: JP Hyogo
- 专利权人: The New Industry Research Organization
- 当前专利权人: The New Industry Research Organization
- 当前专利权人地址: JP Hyogo
- 代理机构: Ogilvie Law Firm
- 优先权: JP2010-181481 20100814
- 国际申请: PCT/JP2011/004580 WO 20110814
- 国际公布: WO2012/023277 WO 20120223
- 主分类号: G11C11/00
- IPC分类号: G11C11/00 ; G11C11/412 ; G11C11/417 ; G11C8/12 ; G11C15/04 ; G11C11/413 ; G11C8/14 ; G11C15/00
摘要:
Provided is memory which is capable of dynamically changing memory cell bit reliability and of switching the operating mode so as to accommodate process variations, thereby reducing the operating voltage. The memory is provided with a mode control line selection circuit for dividing mode control lines in to word units and using control line selection signals and global control signals to control the mode control lines divided into word units, and a word line selection circuit for dividing the word lines that control the conduction of switching unit into word units and using word line selection signals and global word signals to control the word lines divided into word units. The mode control line switching circuit is used to switch between a 1 bit/1 cell mode and a 1 bit/n cell mode in word units.
公开/授权文献
- US20130223137A1 LOW-VOLTAGE SEMICONDUCTOR MEMORY 公开/授权日:2013-08-29