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公开(公告)号：US08787075B2
公开(公告)日：2014-07-22
申请号：US13816718
申请日：2011-08-14
IPC分类号： G11C11/00 , G11C11/412 , G11C11/417 , G11C8/12 , G11C15/04 , G11C11/413 , G11C8/14 , G11C15/00
CPC分类号： G11C11/417 , G11C8/12 , G11C8/14 , G11C11/412 , G11C11/413 , G11C15/00 , G11C15/04 , G11C29/74 , G11C2211/5641
摘要： Provided is memory which is capable of dynamically changing memory cell bit reliability and of switching the operating mode so as to accommodate process variations, thereby reducing the operating voltage. The memory is provided with a mode control line selection circuit for dividing mode control lines in to word units and using control line selection signals and global control signals to control the mode control lines divided into word units, and a word line selection circuit for dividing the word lines that control the conduction of switching unit into word units and using word line selection signals and global word signals to control the word lines divided into word units. The mode control line switching circuit is used to switch between a 1 bit/1 cell mode and a 1 bit/n cell mode in word units.
摘要翻译： 提供了能够动态地改变存储单元位可靠性和切换操作模式以适应过程变化的存储器，从而降低工作电压。 存储器设置有模式控制线选择电路，用于将模式控制线分成单位，并且使用控制线选择信号和全局控制信号来控制分成字单元的模式控制线，以及字线选择电路，用于将 控制开关单元导通到单元的字线，并使用字线选择信号和全局字信号来控制划分为字单位的字线。 模式控制线切换电路用于以单位单位在1位/ 1个单元模式和1位/ n单元模式之间切换。
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公开(公告)号：US08238140B2
公开(公告)日：2012-08-07
申请号：US12809684
申请日：2009-01-07
CPC分类号： G11C11/4125 , G11C5/005
摘要： A memory wherein the bit reliability of the memory cells can be dynamically varied depending on the application or the memory status, the operation stability is ensured, and thereby a low power consumption and a high reliability are realized. Either a mode (a 1-bit/1-cell mode) in which one bit is composed of one memory cell or a mode (a 1-bit/n-cell mode) in which one bit is composed of n (n is two or more) connected memory cells is dynamically selected. When the 1-bit/n-cell mode is selected, the read/write stability of one bit is enhanced, the cell current during read is increased (read is speeded up), and a bit error, if occurs, is self-corrected. Especially, a pair of CMOS transistors and a control line for performing control so as to permit the CMOS transistors to conduct are added between the data holding nodes of n adjacent memory cells. With this, the word line (WL) is controlled, and thereby the operation stability is further improved.
摘要翻译： 可以根据应用或存储器状态来动态地改变存储器单元的位可靠性的存储器，从而确保操作稳定性，从而实现低功耗和高可靠性。 一个位由一个存储器单元组成的模式（1位/ 1单元模式）或其中一个位由n组成的模式（1位/ n单元模式） 或更多）连接的存储器单元被动态地选择。 当选择1位/ n单元模式时，增加了一位的读/写稳定性，读取期间的单元电流增加（读取速度加快），如果出现位错误，则自校正 。 特别地，在n个相邻的存储单元的数据保持节点之间添加一对CMOS晶体管和用于执行控制以允许CMOS晶体管导通的控制线。 由此，对字线（WL）进行控制，从而进一步提高操作稳定性。
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公开(公告)号：US20130223137A1
公开(公告)日：2013-08-29
申请号：US13816718
申请日：2011-08-14
IPC分类号： G11C11/417
CPC分类号： G11C11/417 , G11C8/12 , G11C8/14 , G11C11/412 , G11C11/413 , G11C15/00 , G11C15/04 , G11C29/74 , G11C2211/5641
摘要： Provided is memory which is capable of dynamically changing memory cell bit reliability and of switching the operating mode so as to accommodate process variations, thereby reducing the operating voltage. The memory is provided with a mode control line selection circuit for dividing mode control lines in to word units and using control line selection signals and global control signals to control the mode control lines divided into word units, and a word line selection circuit for dividing the word lines that control the conduction of switching unit into word units and using word line selection signals and global word signals to control the word lines divided into word units. The mode control line switching circuit is used to switch between a 1 bit/1 cell mode and a 1 bit/n cell mode in word units.
摘要翻译： 提供了能够动态地改变存储单元位可靠性和切换操作模式以适应过程变化的存储器，从而降低工作电压。 存储器设置有模式控制线选择电路，用于将模式控制线分成单位，并且使用控制线选择信号和全局控制信号来控制分成字单元的模式控制线，以及字线选择电路，用于将 控制开关单元导通到单元的字线，并使用字线选择信号和全局字信号来控制划分为字单位的字线。 模式控制线切换电路用于以单位单位在1位/ 1个单元模式和1位/ n单元模式之间切换。
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