Invention Grant
- Patent Title: Junction-isolated blocking voltage devices with integrated protection structures and methods of forming the same
- Patent Title (中): 具有集成保护结构的结隔离隔离电压装置及其形成方法
-
Application No.: US13682284Application Date: 2012-11-20
-
Publication No.: US08796729B2Publication Date: 2014-08-05
- Inventor: David J Clarke , Javier Alejandro Salcedo , Brian B Moane , Juan Luo , Seamus Murnane , Kieran K Heffernan , John Twomey , Stephen Denis Heffernan , Gavin Patrick Cosgrave
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L29/747
- IPC: H01L29/747

Abstract:
Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.
Public/Granted literature
Information query
IPC分类: