公开(公告)号：US20140332843A1

公开(公告)日：2014-11-13

申请号：US14446205

申请日：2014-07-29

Applicant: Analog Devices, Inc.

Inventor： David J. Clarke ,  Javier Alejandro Salcedo ,  Brian B. Moane ,  Juan Luo ,  Seamus Murnane ,  Kieran K. Heffernan ,  John Twomey ,  Stephen Denis Heffernan ,  Gavin Patrick Cosgrave

IPC: H01L27/02 ,  H01L29/747 ,  H01L29/74 ,  H01L27/06

CPC classification number: H01L27/0248 ,  H01L27/0635 ,  H01L27/0647 ,  H01L29/0692 ,  H01L29/66386 ,  H01L29/7412 ,  H01L29/747

Abstract: Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.

Abstract translation: 提供了隔离隔离电压装置及其形成方法。 在某些实施方案中，阻断电压装置包括电连接到第一p阱的阳极端子，电连接到第一n阱的阴极端子，电连接到第二p阱的接地端子，以及n型 用于将第一p阱与p型衬底隔离的隔离层。 第一个p阱和第一个n阱作为阻塞二极管工作。 阻断电压装置还包括与形成在第一n阱，第一n阱，第一p阱以及形成在第一p阱中的N +区相关的PN +可控硅整流器（SCR） 。 另外，阻断电压装置还包括与形成在第一p阱，第一p阱，n型隔离层，第二p阱以及形成在第一p阱中的N +区域相关联的N +区域的NPNPN双向SCR 第二个p井。

公开(公告)号：US09275991B2

公开(公告)日：2016-03-01

申请号：US13766541

申请日：2013-02-13

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Juan Luo

IPC: H01L29/66 ,  H01L23/62 ,  H01L27/02 ,  H01L27/06 ,  H01L27/092

CPC classification number: H01L27/067 ,  H01L27/0262 ,  H01L27/0921

Abstract: An apparatus for transceiver signal isolation and voltage clamp from transient electrical events includes a bi-directional protection device comprising a bipolar PNPNP device assembly, a first parasitic PNPN device assembly, and a second parasitic PNPN device assembly. The bipolar PNPNP device assembly includes an NPN bi-directional bipolar transistor, a first PNP bipolar transistor, and a second PNP bipolar transistor, and is configured to receive a transient voltage signal through first and second pads. The first and second pads are electrically connected to the PNPNP device assembly through emitters of the first and second PNP bipolar transistors. The bipolar PNPNP device assembly is electrically connected to a first parasitic PNPN device assembly comprising a parasitic PNP bipolar transistor and a first parasitic NPN bipolar transistor. The bipolar PNPNP device assembly is further connected to a second parasitic parasitic PNPN device assembly comprising the parasitic PNP bipolar transistor and a second parasitic NPN bipolar transistor. The base of the parasitic PNP bipolar transistor is connected to the substrate of the transceiver through a resistor to prevent triggering and breakdown of the first and second parasitic PNPN device assemblies.

Abstract translation: 一种用于来自瞬态电气事件的收发信机隔离和电压钳位的装置包括双向保护装置，其包括双极性PNPNP器件组件，第一寄生PNPN器件组件和第二寄生PNPN器件组件。 双极PNPNP器件组件包括NPN双向双极晶体管，第一PNP双极晶体管和第二PNP双极晶体管，并且被配置为通过第一和第二焊盘接收瞬态电压信号。 第一和第二焊盘通过第一和第二PNP双极晶体管的发射极电连接到PNPNP器件组件。 双极PNPNP器件组件电连接到包括寄生PNP双极晶体管和第一寄生NPN双极晶体管的第一寄生PNPN器件组件。 双极PNPNP器件组件还连接到包括寄生PNP双极晶体管和第二寄生NPN双极晶体管的第二寄生寄生PNPN器件组件。 寄生PNP双极晶体管的基极通过电阻连接到收发器的基板，以防止第一和第二寄生PNPN器件组件的触发和击穿。

公开(公告)号：US20140225228A1

公开(公告)日：2014-08-14

申请号：US13766541

申请日：2013-02-13

Applicant: ANALOG DEVICES, INC.

Inventor： Javier Alejandro Salcedo ,  Juan Luo

IPC: H01L27/06

CPC classification number: H01L27/067 ,  H01L27/0262 ,  H01L27/0921

Abstract: An apparatus for transceiver signal isolation and voltage clamp from transient electrical events includes a bi-directional protection device comprising a bipolar PNPNP device assembly, a first parasitic PNPN device assembly, and a second parasitic PNPN device assembly. The bipolar PNPNP device assembly includes an NPN bi-directional bipolar transistor, a first PNP bipolar transistor, and a second PNP bipolar transistor, and is configured to receive a transient voltage signal through first and second pads. The first and second pads are electrically connected to the PNPNP device assembly through emitters of the first and second PNP bipolar transistors. The bipolar PNPNP device assembly is electrically connected to a first parasitic PNPN device assembly comprising a parasitic PNP bipolar transistor and a first parasitic NPN bipolar transistor. The bipolar PNPNP device assembly is further connected to a second parasitic parasitic PNPN device assembly comprising the parasitic PNP bipolar transistor and a second parasitic NPN bipolar transistor. The base of the parasitic PNP bipolar transistor is connected to the substrate of the transceiver through a resistor to prevent triggering and breakdown of the first and second parasitic PNPN device assemblies.

Abstract translation: 一种用于来自瞬态电气事件的收发信机隔离和电压钳位的装置包括双向保护装置，其包括双极性PNPNP器件组件，第一寄生PNPN器件组件和第二寄生PNPN器件组件。 双极PNPNP器件组件包括NPN双向双极晶体管，第一PNP双极晶体管和第二PNP双极晶体管，并且被配置为通过第一和第二焊盘接收瞬态电压信号。 第一和第二焊盘通过第一和第二PNP双极晶体管的发射极电连接到PNPNP器件组件。 双极PNPNP器件组件电连接到包括寄生PNP双极晶体管和第一寄生NPN双极晶体管的第一寄生PNPN器件组件。 双极PNPNP器件组件还连接到包括寄生PNP双极晶体管和第二寄生NPN双极晶体管的第二寄生寄生PNPN器件组件。 寄生PNP双极晶体管的基极通过电阻连接到收发器的基板，以防止第一和第二寄生PNPN器件组件的触发和击穿。

公开(公告)号：US20160141358A1

公开(公告)日：2016-05-19

申请号：US14546703

申请日：2014-11-18

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  James Zhao ,  Juan Luo

IPC: H01L29/06 ,  H01L21/761 ,  H01L27/02

CPC classification number: H01L29/0646 ,  H01L21/761 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0259 ,  H01L27/0262 ,  H01L27/0292 ,  H01L29/0653 ,  H01L29/73 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.

Abstract translation: 提供收发器接口过电压钳位的装置和方法。 在某些配置中，接口装置包括n型隔离结构中的第一p型阱区和第二p型阱区。 此外，夹持装置包括第一p型阱区中的第一p型有源区和第一n型有源区，并且电连接到钳位装置的第一端。 此外，夹持装置在第二p型阱区域中包括第二p型有源区和第二n型有源区，并且电连接到钳位装置的第二端。 n型隔离结构在半导体衬底的p型区域中，并将第一和第二p型阱区与p型衬底区电隔离。 钳位装置还包括位于第一和第二n型有源区之间的阻挡电压调谐结构。

公开(公告)号：US09478608B2

公开(公告)日：2016-10-25

申请号：US14546703

申请日：2014-11-18

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  James Zhao ,  Juan Luo

IPC: H01L27/02 ,  H01L23/62 ,  H01L29/06 ,  H01L21/761

CPC classification number: H01L29/0646 ,  H01L21/761 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0259 ,  H01L27/0262 ,  H01L27/0292 ,  H01L29/0653 ,  H01L29/73 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.

Abstract translation: 提供收发器接口过电压钳位的装置和方法。 在某些配置中，接口装置包括n型隔离结构中的第一p型阱区和第二p型阱区。 此外，夹持装置包括第一p型阱区中的第一p型有源区和第一n型有源区，并且电连接到钳位装置的第一端。 此外，夹持装置在第二p型阱区域中包括第二p型有源区和第二n型有源区，并且电连接到钳位装置的第二端。 n型隔离结构在半导体衬底的p型区域中，并将第一和第二p型阱区与p型衬底区电隔离。 钳位装置还包括位于第一和第二n型有源区之间的阻挡电压调谐结构。

公开(公告)号：US09356011B2

公开(公告)日：2016-05-31

申请号：US14446205

申请日：2014-07-29

Applicant: Analog Devices, Inc.

Inventor： David J. Clarke ,  Javier Alejandro Salcedo ,  Brian B. Moane ,  Juan Luo ,  Seamus Murnane ,  Kieran K. Heffernan ,  John Twomey ,  Stephen Denis Heffernan ,  Gavin Patrick Cosgrave

IPC: H01L29/747 ,  H01L27/02 ,  H01L29/66 ,  H01L29/06 ,  H01L27/06 ,  H01L29/74

CPC classification number: H01L27/0248 ,  H01L27/0635 ,  H01L27/0647 ,  H01L29/0692 ,  H01L29/66386 ,  H01L29/7412 ,  H01L29/747

Abstract: Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.

Abstract translation: 提供了隔离隔离电压装置及其形成方法。 在某些实施方案中，阻断电压装置包括电连接到第一p阱的阳极端子，电连接到第一n阱的阴极端子，电连接到第二p阱的接地端子，以及n型 用于将第一p阱与p型衬底隔离的隔离层。 第一个p阱和第一个n阱作为阻塞二极管工作。 阻断电压装置还包括与形成在第一n阱，第一n阱，第一p阱以及形成在第一p阱中的N +区相关的PN +可控硅整流器（SCR） 。 另外，阻断电压装置还包括与形成在第一p阱，第一p阱，n型隔离层，第二p阱以及形成在第一p阱中的N +区域相关联的N +区域的NPNPN双向SCR 第二个p井。

公开(公告)号：US08796729B2

公开(公告)日：2014-08-05

申请号：US13682284

申请日：2012-11-20

Applicant: Analog Devices, Inc.

Inventor： David J Clarke ,  Javier Alejandro Salcedo ,  Brian B Moane ,  Juan Luo ,  Seamus Murnane ,  Kieran K Heffernan ,  John Twomey ,  Stephen Denis Heffernan ,  Gavin Patrick Cosgrave

IPC: H01L29/747

CPC classification number: H01L27/0248 ,  H01L27/0635 ,  H01L27/0647 ,  H01L29/0692 ,  H01L29/66386 ,  H01L29/7412 ,  H01L29/747

Abstract: Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.

Abstract translation: 提供了隔离隔离电压装置及其形成方法。 在某些实施方案中，阻断电压装置包括电连接到第一p阱的阳极端子，电连接到第一n阱的阴极端子，电连接到第二p阱的接地端子，以及n型 用于将第一p阱与p型衬底隔离的隔离层。 第一个p阱和第一个n阱作为阻塞二极管工作。 阻断电压装置还包括与形成在第一n阱，第一n阱，第一p阱以及形成在第一p阱中的N +区相关的PN +可控硅整流器（SCR） 。 另外，阻断电压装置还包括与形成在第一p阱，第一p阱，n型隔离层，第二p阱以及形成在第一p阱中的N +区域相关联的N +区域的NPNPN双向SCR 第二个p井。