Invention Grant
US08799585B2 Cache memory capable of adjusting burst length of write-back data in write-back operation
有权
能够在回写操作中调整写回数据的突发长度的高速缓冲存储器
- Patent Title: Cache memory capable of adjusting burst length of write-back data in write-back operation
- Patent Title (中): 能够在回写操作中调整写回数据的突发长度的高速缓冲存储器
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Application No.: US13893746Application Date: 2013-05-14
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Publication No.: US08799585B2Publication Date: 2014-08-05
- Inventor: Kil Whan Lee , Young Jin Chung
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP
- Priority: KR10-2007-0121450 20071127
- Main IPC: G06F13/00
- IPC: G06F13/00
Abstract:
A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.
Public/Granted literature
- US20130254493A1 CACHE MEMORY CAPABLE OF ADJUSTING BURST LENGTH OF WRITE-BACK DATA IN WRITE-BACK OPERATION Public/Granted day:2013-09-26
Information query
