公开(公告)号：US12244934B2

公开(公告)日：2025-03-04

申请号：US17728421

申请日：2022-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Ae Kim ,  Seong Woon Kim ,  Kil Whan Lee ,  Sang Hoon Lee ,  Yong Kwon Cho ,  Sang Hoon Ha

IPC: H04N23/741 ,  G06T1/20 ,  G06T1/60 ,  G06T5/92

Abstract: A system on chip and a mobile device are provided, the mobile device including a processor that receives raw image data, processes the raw image data into floating-point format image data, and output the floating-point format image data; a memory that stores therein the floating-point format image data; and a display processing unit that receives the floating-point format image data stored in the memory therefrom, and performs high dynamic range (HDR) processing on the floating-point format image data.

公开(公告)号：US11095876B2

公开(公告)日：2021-08-17

申请号：US16252806

申请日：2019-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Ho Jun ,  Chang Soo Park ,  Moon Kyu Song ,  Kyung Koo Lee ,  Kil Whan Lee ,  Hyuk Jae Jang ,  Kyung Ah Jeong

IPC: H04N19/103 ,  H04N19/46 ,  H04N19/91 ,  G06F13/16 ,  H04N19/186 ,  H04N19/176 ,  H04N19/124 ,  H04N19/12

Abstract: Provided is an image processing device configured to compress first image data. The image processing device includes an encoding circuit configured to compress the first image data into second image data including prediction data and residual data, compress the second image data into third image data by performing entropy encoding on the second image data, generate a header representing a compression ratio of the third image data, and store the third image data along with the header in a memory device as compressed first image data.

公开(公告)号：US09779547B2

公开(公告)日：2017-10-03

申请号：US14310351

申请日：2014-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hoon Kim ,  Yong Ha Park ,  Chang Hyo Yu ,  Kil Whan Lee

IPC: G06T15/00 ,  G06T17/20 ,  G06T15/04 ,  G06T11/40

CPC classification number: G06T17/20 ,  G06T11/40 ,  G06T15/005 ,  G06T15/04 ,  G06T17/205

Abstract: A tessellation method includes assigning a tessellation factor to each of a plurality of points in a patch and generating, in the vicinity of a first point of the plurality of points, at least one new point based on a first tessellation factor assigned to the first point. The at least one first new point corresponds to the first point.

公开(公告)号：US09460559B2

公开(公告)日：2016-10-04

申请号：US14306782

申请日：2014-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hoon Kim ,  Chang Hyo Yu ,  Kil Whan Lee ,  Yong Ha Park

IPC: G06T17/20 ,  G06T9/00

CPC classification number: G06T17/20 ,  G06T9/001 ,  G06T2210/52

Abstract: A method of generating tessellation data include analyzing patch data of each of a plurality of patches; generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing; and compressing the non-shared data and the attribute data.

Abstract translation: 生成细分数据的方法包括分析多个贴片中的每一个的贴片数据; 根据分析结果生成补丁共享的共享数据，不是由补丁共享的非共享数据，以及来自补丁数据的每个补丁的控制点的属性的属性数据; 并压缩非共享数据和属性数据。

公开(公告)号：US20130254493A1

公开(公告)日：2013-09-26

申请号：US13893746

申请日：2013-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil Whan Lee ,  Young Jin Chung

IPC: G06F12/08

CPC classification number: G06F12/0815 ,  G06F12/0804 ,  G06F12/0879

Abstract: A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.

Abstract translation: 高速缓冲存储器包括回写确定单元和突发长度确定单元。 回写确定单元基于块的n位脏值来确定块是否是回写块。 当块是回写块时，突发长度确定单元基于n位脏值和最小突发长度来确定包含在写回块中的回写数据的突发长度。

公开(公告)号：US11991347B2

公开(公告)日：2024-05-21

申请号：US17377927

申请日：2021-07-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Ho Jun ,  Chang Soo Park ,  Moon Kyu Song ,  Kyung Koo Lee ,  Kil Whan Lee ,  Hyuk Jae Jang ,  Kyung Ah Jeong

IPC: H04N19/103 ,  G06F13/16 ,  H04N19/12 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/46 ,  H04N19/91

CPC classification number: H04N19/103 ,  G06F13/1668 ,  H04N19/12 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/46 ,  H04N19/91

Abstract: Provided is an image processing device configured to compress first image data. The image processing device includes an encoding circuit configured to compress the first image data into second image data including prediction data and residual data, compress the second image data into third image data by performing entropy encoding on the second image data, generate a header representing a compression ratio of the third image data, and store the third image data along with the header in a memory device as compressed first image data.

公开(公告)号：US20150042649A1

公开(公告)日：2015-02-12

申请号：US14306782

申请日：2014-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEOK HOON KIM ,  Chang Hyo Yu ,  Kil Whan Lee ,  Yong Ha Park

IPC: G06T17/20

CPC classification number: G06T17/20 ,  G06T9/001 ,  G06T2210/52

Abstract: A method of generating tessellation data include analyzing patch data of each of a plurality of patches; generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing; and compressing the non-shared data and the attribute data.

Abstract translation: 生成细分数据的方法包括分析多个贴片中的每一个的贴片数据; 根据分析结果生成补丁共享的共享数据，不是由补丁共享的非共享数据，以及来自补丁数据的每个补丁的控制点的属性的属性数据; 并压缩非共享数据和属性数据。

公开(公告)号：US12148353B2

公开(公告)日：2024-11-19

申请号：US17867033

申请日：2022-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Woon Kim ,  Kil Whan Lee ,  Sun-Ae Kim ,  Sang Hoon Lee ,  Yong Kwon Cho ,  Sang Hoon Ha

IPC: G09G3/20

Abstract: A display controller includes a resource controller configured to receive layer information about each of a first layer and a second layer that are output at different times through a display panel during a unit frame. The display controller includes a data input direct memory access (DMA) configured to receive first image data corresponding to the first layer and second image data corresponding to the second layer, and a hardware resource configured to receive the first and second image data from the data input DMA, process the received first and second image data according to the layer information, and generate first layer data of the first layer and second layer data of the second layer. The resource controller is configured to control the data input DMA according to the layer information to determine an order in which the first and second image data are provided to the hardware resource.

公开(公告)号：US11445160B2

公开(公告)日：2022-09-13

申请号：US17034403

申请日：2020-09-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Ho Jun ,  Kil Whan Lee

IPC: H04N9/808 ,  G11B20/00 ,  H04N9/825 ,  G11B20/10 ,  H04N19/186 ,  H04N19/00 ,  H04N19/176 ,  H04N19/61 ,  H04N19/124 ,  H04N19/146 ,  H04N19/60 ,  H04N19/91 ,  H04N19/50

Abstract: An image processing device includes a multimedia intellectual property (IP) block which processes image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) which compresses the image data to generate compressed data and stores the compressed data in the memory. The frame buffer compressor includes a logic circuit which controls a compression sequence of the first component and the second component of the image data.

公开(公告)号：US10819965B2

公开(公告)日：2020-10-27

申请号：US16181957

申请日：2018-11-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Ho Jun ,  Kil Whan Lee

IPC: H04N9/80 ,  H04N9/808 ,  G11B20/00 ,  H04N9/825 ,  G11B20/10 ,  H04N19/186 ,  H04N19/00 ,  H04N19/176 ,  H04N19/61 ,  H04N19/124 ,  H04N19/146 ,  H04N19/60 ,  H04N19/91 ,  H04N19/50

Abstract: An image processing device includes a multimedia intellectual property (IP) block which processes image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) which compresses the image data to generate compressed data and stores the compressed data in the memory. The frame buffer compressor includes a logic circuit which controls a compression sequence of the first component and the second component of the image data.