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1.发明申请CACHE MEMORY CAPABLE OF ADJUSTING BURST LENGTH OF WRITE-BACK DATA IN WRITE-BACK OPERATION 有权在回写操作中调整回写数据长度的高速缓存存储器公开(公告)号：US20130254493A1
公开(公告)日：2013-09-26
申请号：US13893746
申请日：2013-05-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kil Whan Lee , Young Jin Chung
IPC: G06F12/08
CPC classification number: G06F12/0815 , G06F12/0804 , G06F12/0879
Abstract: A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.
Abstract translation: 高速缓冲存储器包括回写确定单元和突发长度确定单元。 回写确定单元基于块的n位脏值来确定块是否是回写块。 当块是回写块时，突发长度确定单元基于n位脏值和最小突发长度来确定包含在写回块中的回写数据的突发长度。
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2.发明授权Cache memory capable of adjusting burst length of write-back data in write-back operation 有权能够在回写操作中调整写回数据的突发长度的高速缓冲存储器公开(公告)号：US08799585B2
公开(公告)日：2014-08-05
申请号：US13893746
申请日：2013-05-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kil Whan Lee , Young Jin Chung
IPC: G06F13/00
CPC classification number: G06F12/0815 , G06F12/0804 , G06F12/0879
Abstract: A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.
Abstract translation: 高速缓冲存储器包括回写确定单元和突发长度确定单元。 回写确定单元基于块的n位脏值来确定块是否是回写块。 当块是回写块时，突发长度确定单元基于n位脏值和最小突发长度来确定包含在写回块中的回写数据的突发长度。
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