发明授权
- 专利标题： Trench MOS transistor and method of manufacturing the same
- 专利标题（中）： 沟槽MOS晶体管及其制造方法
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申请号： US13438058申请日： 2012-04-03
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公开(公告)号： US08803231B2公开(公告)日： 2014-08-12
- 发明人: Tomomitsu Risaki , Jun Osanai
- 申请人： Tomomitsu Risaki , Jun Osanai
- 申请人地址： JP Chiba
- 专利权人： Seiko Instruments, Inc.
- 当前专利权人： Seiko Instruments, Inc.
- 当前专利权人地址： JP Chiba
- 代理机构： Brinks Gilson & Lione
- 优先权： JP2007-028294 20070207
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336
摘要：
Trench portions (10) are formed in a well (5) in order to provide unevenness in the well (5). A gate electrode (2) is formed via an insulating film (7) on the upper surface and inside of the trench portions (10). A source region (3) is formed on one side of the gate electrode (2) in a gate length direction while a drain region (4) on another side. Both of the source region (3) and the drain region (4) are formed down to near the bottom portion of the gate electrode (2). By deeply forming the source region (3) and the drain region (4), current uniformly flows through the whole trench portions (10), and the unevenness formed in the well (5) increases the effective gate width to decrease the on-resistance of a semiconductor device 1 and to enhance the drivability thereof.
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