- 专利标题： System and methods for converting planar design to FinFET design
-
申请号： US13416862申请日： 2012-03-09
-
公开(公告)号： US08816444B2公开(公告)日： 2014-08-26
- 发明人: Clement Hsingjen Wann , Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh , Ting-Chu Ko , Chung-Hsien Chen
- 申请人： Clement Hsingjen Wann , Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh , Ting-Chu Ko , Chung-Hsien Chen
- 申请人地址： TW
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW
- 代理机构： Lowe Hauptman & Ham, LLP
- 主分类号： H01L27/088
- IPC分类号： H01L27/088
摘要：
A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated in a matching fashion. The resulting FinFET structures are then optimized. Dummy patterns and a new metal layer may be generated before the FinFET layout is verified and outputted.