公开(公告)号：US20130015581A1

公开(公告)日：2013-01-17

申请号：US13182368

申请日：2011-07-13

申请人： Hsingjen Wann ,  Ting-Chu Ko

发明人： Hsingjen Wann ,  Ting-Chu Ko

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76844 ,  H01L21/76877 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides an integrated circuit structure. The integrated circuit structure includes a substrate having an IC device formed therein; a first dielectric material layer disposed on the substrate and having a first trench formed therein; and a first composite interconnect feature disposed in the first trench and electrically coupled with the IC device. The first composite interconnect feature includes a first barrier layer disposed on sidewalls of the first trench; a first metal layer disposed on the first barrier layer; and a first graphene layer disposed on the metal layer.

摘要翻译： 本发明提供一种集成电路结构。 集成电路结构包括其中形成有IC器件的衬底; 第一电介质材料层，设置在所述衬底上并且具有形成在其中的第一沟槽; 以及设置在所述第一沟槽中并与所述IC器件电耦合的第一复合互连特征。 第一复合互连特征包括设置在第一沟槽的侧壁上的第一阻挡层; 设置在所述第一阻挡层上的第一金属层; 以及设置在所述金属层上的第一石墨烯层。

公开(公告)号：US07771579B2

公开(公告)日：2010-08-10

申请号：US11004294

申请日：2004-12-03

申请人： Ting-Chu Ko ,  Chien-Hsueh Shih ,  Minghsing Tsai

发明人： Ting-Chu Ko ,  Chien-Hsueh Shih ,  Minghsing Tsai

IPC分类号： C25D3/38

CPC分类号： C25D3/38 ,  C25D3/02 ,  H01L21/2885 ,  H01L21/76877

摘要： A chemical solution for an electro chemical plating process includes an electro chemical plating solution; and an additive, added in the electro chemical plating solution, substantially consisting of a polymer with one or more kinds of impurities, wherein each kind of the impurities has a density, with respect to the polymer, lower then 1019 atoms/cc.

摘要翻译： 化学电镀工艺的化学溶液包括电化学镀液; 以及添加在电化学镀液中的添加剂，其基本上由具有一种或多种杂质的聚合物组成，其中各种杂质相对于聚合物的密度低于1019原子/ cc。

公开(公告)号：US20090004851A1

公开(公告)日：2009-01-01

申请号：US11770817

申请日：2007-06-29

申请人： Shau-Lin Shue ,  Ting-Chu Ko ,  Chien-Hsueh Shih

发明人： Shau-Lin Shue ,  Ting-Chu Ko ,  Chien-Hsueh Shih

IPC分类号： H01L21/02

CPC分类号： H01L21/2254 ,  H01L21/28518 ,  H01L21/288

摘要： A selective electroless plating operation provides for the selective deposition of a metal film only on exposed silicon surfaces of a semiconductor substrate and not on other surfaces such as dielectric surfaces. The plating solution includes metal ions and advantageously also includes dopant impurity ions. The pure metal or metal alloy film formed on the exposed silicon surfaces is then heat treated to form a metal silicide on the exposed silicon surfaces and to drive the dopant impurities to the interface formed between the exposed silicon surfaces and the metal silicide film.

摘要翻译： 选择性化学镀操作提供仅在半导体衬底的暴露的硅表面上而不是在诸如电介质表面的其它表面上的金属膜的选择性沉积。 电镀溶液包括金属离子，并且有利地还包括掺杂剂杂质离子。 形成在暴露的硅表面上的纯金属或金属合金膜然后被热处理以在暴露的硅表面上形成金属硅化物，并将掺杂剂杂质驱动到形成在暴露的硅表面和金属硅化物膜之间的界面。

公开(公告)号：US07226860B2

公开(公告)日：2007-06-05

申请号：US10833154

申请日：2004-04-28

申请人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

发明人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

IPC分类号： H01L21/44

CPC分类号： H01L21/2885 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873 ,  H01L21/76877

摘要： A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.

公开(公告)号：US20050029659A1

公开(公告)日：2005-02-10

申请号：US10637105

申请日：2003-08-08

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US08785321B2

公开(公告)日：2014-07-22

申请号：US13249823

申请日：2011-09-30

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US08716863B2

公开(公告)日：2014-05-06

申请号：US13182368

申请日：2011-07-13

申请人： Hsingjen Wann ,  Ting-Chu Ko

发明人： Hsingjen Wann ,  Ting-Chu Ko

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L23/52 ,  H01L21/02

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76844 ,  H01L21/76877 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides an integrated circuit structure. The integrated circuit structure includes a substrate having an IC device formed therein; a first dielectric material layer disposed on the substrate and having a first trench formed therein; and a first composite interconnect feature disposed in the first trench and electrically coupled with the IC device. The first composite interconnect feature includes a first barrier layer disposed on sidewalls of the first trench; a first metal layer disposed on the first barrier layer; and a first graphene layer disposed on the metal layer.

摘要翻译： 本发明提供一种集成电路结构。 集成电路结构包括其中形成有IC器件的衬底; 第一电介质材料层，设置在所述衬底上并且具有形成在其中的第一沟槽; 以及设置在所述第一沟槽中并与所述IC器件电耦合的第一复合互连特征。 第一复合互连特征包括设置在第一沟槽的侧壁上的第一阻挡层; 设置在所述第一阻挡层上的第一金属层; 以及设置在所述金属层上的第一石墨烯层。

公开(公告)号：US08101489B2

公开(公告)日：2012-01-24

申请号：US12021062

申请日：2008-01-28

申请人： Shau-Lin Shue ,  Ting-Chu Ko

发明人： Shau-Lin Shue ,  Ting-Chu Ko

IPC分类号： H01L21/336

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/324 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： A method for fabricating a semiconductor device is disclosed. First, a semiconductor substrate having a doped region(s) is provided. Thereafter, a pre-amorphous implantation process and neutral (or non-neutral) species implantation process is performed over the doped region(s) of the semiconductor substrate. Subsequently, a silicide is formed in the doped region(s). By conducting a pre-amorphous implantation combined with a neutral species implantation, the present invention reduces the contact resistance, such as at the contact area silicide and source/drain substrate interface.

摘要翻译： 公开了一种制造半导体器件的方法。 首先，提供具有掺杂区域的半导体衬底。 此后，在半导体衬底的掺杂区域上执行预非晶体注入工艺和中性（或非中性）物质注入工艺。 随后，在掺杂区域中形成硅化物。 通过进行与中性物质注入组合的预非晶注入，本发明降低了接触电阻，例如在接触面积硅化物和源极/漏极衬底界面处。

公开(公告)号：US20070054488A1

公开(公告)日：2007-03-08

申请号：US11341827

申请日：2006-01-27

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US20050245072A1

公开(公告)日：2005-11-03

申请号：US10833154

申请日：2004-04-28

申请人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

发明人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

IPC分类号： H01L21/288 ,  H01L21/4763 ,  H01L21/76 ,  H01L21/768

CPC分类号： H01L21/2885 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873 ,  H01L21/76877

摘要： A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.

摘要翻译： 电化学沉积（ECD）的方法在衬底上提供阻挡层和种子层。 在将金属层电化学沉积在具有物理或化学表面处理工艺的电化学镀覆电池中之前，对基板的表面进行预处理。 电化学镀覆电池被盖覆盖以防止电解质溶液的蒸发。 电化学电镀单元包括具有提升密封件的衬底保持器组件，例如在提升密封件和衬底之间的接触角θ小于90°。 衬底保持器组件包括在衬底的后侧的衬底卡盘。