发明授权
- 专利标题: Semiconductor storage device and data control method thereof
- 专利标题(中): 半导体存储装置及其数据控制方法
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申请号: US13597814申请日: 2012-08-29
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公开(公告)号: US08861265B2公开(公告)日: 2014-10-14
- 发明人: Tomonori Kurosawa , Mizuki Kaneko , Takafumi Shimotori , Takayuki Tsukamoto , Yoichi Minemura , Hiroshi Kanno
- 申请人: Tomonori Kurosawa , Mizuki Kaneko , Takafumi Shimotori , Takayuki Tsukamoto , Yoichi Minemura , Hiroshi Kanno
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- 优先权: JP2011-207869 20110922
- 主分类号: G11C13/00
- IPC分类号: G11C13/00
摘要:
In a memory cell array, memory cells each including a variable resistance element are arranged at crossing portions between a plurality of first wiring and a plurality of second wirings. A control circuit executes a set operation, a reset operation, and a training operation. In the set operation, a set pulse is applied to the variable resistance element to change the variable resistance element from a high resistance state to a low resistance state. In the reset operation, a reset pulse having an opposite polarity to the polarity of the set pulse is applied to the variable resistance element to change the variable resistance element from the low resistance state to the high resistance state. In the training operation, the set pulse and the reset pulse are continuously applied to the variable resistance element.