发明授权
US08874885B2 Mitigating lookahead branch prediction latency by purposely stalling a branch instruction until a delayed branch prediction is received or a timeout occurs
有权
通过故意停止分支指令,直到接收到延迟的分支预测或发生超时来减轻前瞻分支预测等待时间
- 专利标题: Mitigating lookahead branch prediction latency by purposely stalling a branch instruction until a delayed branch prediction is received or a timeout occurs
- 专利标题(中): 通过故意停止分支指令,直到接收到延迟的分支预测或发生超时来减轻前瞻分支预测等待时间
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申请号: US12029543申请日: 2008-02-12
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公开(公告)号: US08874885B2公开(公告)日: 2014-10-28
- 发明人: James J. Bonanno , David S. Hutton , Brian R. Prasky , Anthony Saporito
- 申请人: James J. Bonanno , David S. Hutton , Brian R. Prasky , Anthony Saporito
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Cantor Colburn LLP
- 代理商 Margaret McNamara
- 主分类号: G06F9/30
- IPC分类号: G06F9/30 ; G06F9/38
摘要:
Embodiments relate to mitigation of lookahead branch predication latency. An aspect includes receiving an instruction address in an instruction cache for fetching instructions in a microprocessor pipeline. Another aspect includes receiving the instruction address in a branch presence predictor coupled to the microprocessor pipeline. Another aspect includes determining, by the branch presence predictor, presence of a branch instruction in the instructions being fetched, wherein the branch instruction is predictable by the branch target buffer, and any indication of the instruction address not written to the branch target buffer is also not written to the branch presence predictor. Another aspect includes, based on receipt of an indication that the branch instruction is present from the branch presence predictor, holding the branch instruction. Another aspect includes, based on receipt of a branch prediction corresponding to the branch instruction from the branch target buffer, releasing said held branch instruction to the pipeline.
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