发明授权
- 专利标题: Non-volatile memory (NVM) and logic integration
- 专利标题(中): 非易失性存储器(NVM)和逻辑集成
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申请号: US13441426申请日: 2012-04-06
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公开(公告)号: US08906764B2公开(公告)日: 2014-12-09
- 发明人: Mehul D. Shroff , Mark D. Hall
- 申请人: Mehul D. Shroff , Mark D. Hall
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 代理商 Joanna G. Chiu; James L. Clingan, Jr.
- 主分类号: H01L21/8247
- IPC分类号: H01L21/8247
摘要:
A method of forming an NVM cell and a logic transistor uses a semiconductor substrate. A metal select gate of the NVM cell is formed over an NVM work function setting metal, the NVM work function setting metal is on a high-k dielectric, and a metal logic gate of a logic transistor is similarly formed over work function setting and high-k dielectric materials. The logic transistor is formed while portions of the metal select gate of the NVM cell are formed. The logic transistor is protected while the NVM cell is then formed including forming a charge storage region using nanocrystals and a metal control gate over a portion of the metal select gate and a portion of the charge storage region over the substrate. The charge storage region is etched to be aligned to the metal control gate.
公开/授权文献
- US20130171786A1 NON-VOLATILE MEMORY (NVM) AND LOGIC INTEGRATION 公开/授权日:2013-07-04