Invention Grant
US08907483B2 Semiconductor device having a self-forming barrier layer at via bottom
有权
半导体器件在通孔底部具有自形成阻挡层
- Patent Title: Semiconductor device having a self-forming barrier layer at via bottom
- Patent Title (中): 半导体器件在通孔底部具有自形成阻挡层
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Application No.: US13648433Application Date: 2012-10-10
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Publication No.: US08907483B2Publication Date: 2014-12-09
- Inventor: Larry Zhao , Ming He , Xunyuan Zhang , Sean Xuan Lin
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Keohane & D'Alessandro PLLC
- Agent Darrell L. Pogue
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
An approach for forming a semiconductor device is provided. In general, the device is formed by providing a metal layer, a cap layer over the metal layer, and an ultra low k layer over the cap layer. A via is then formed through the ultra low k layer and the cap layer. Once the via is formed, a barrier layer (e.g., cobalt (Co), tantalum (Ta), cobalt-tungsten-phosphide (CoWP), or other metal capable of acting as a copper (CU) diffusion barrier) is selectively applied to a bottom surface of the via. A liner layer (e.g., manganese (MN) or aluminum (AL)) is then applied to a set of sidewalls of the via. The via may then be filled with a subsequent metal layer (with or without a seed layer), and the device may the then be further processed (e.g., annealed).
Public/Granted literature
- US20140097538A1 SEMICONDUCTOR DEVICE HAVING A SELF-FORMING BARRIER LAYER AT VIA BOTTOM Public/Granted day:2014-04-10
Information query
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