发明授权
- 专利标题： Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution
- 专利标题（中）： 将顺序程序分解为多个线程的系统，方法和装置，执行所述线程，并重建顺序执行
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申请号： US12624804申请日： 2009-11-24
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公开(公告)号： US08909902B2公开(公告)日： 2014-12-09
- 发明人: Fernando Latorre , Josep M. Codina , Enric Gibert Codina , Pedro Lopez , Carlos Madriles , Alejandro Martinez Vincente , Raul Martinez , Antonio Gonzalez
- 申请人： Fernando Latorre , Josep M. Codina , Enric Gibert Codina , Pedro Lopez , Carlos Madriles , Alejandro Martinez Vincente , Raul Martinez , Antonio Gonzalez
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F9/40
- IPC分类号： G06F9/40
摘要：
Systems, methods, and apparatuses for decomposing a sequential program into multiple threads, executing these threads, and reconstructing the sequential execution of the threads are described. A plurality of data cache units (DCUs) store locally retired instructions of speculatively executed threads. A merging level cache (MLC) merges data from the lines of the DCUs. An inter-core memory coherency module (ICMC) globally retire instructions of the speculatively executed threads in the MLC.
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