发明授权
- 专利标题: Field effect transistor, method for producing the same, and electronic device
- 专利标题(中): 场效应晶体管,其制造方法和电子器件
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申请号: US13637555申请日: 2010-12-15
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公开(公告)号: US08921894B2公开(公告)日: 2014-12-30
- 发明人: Yuji Ando , Takashi Inoue , Kazuki Ota , Yasuhiro Okamoto , Tatsuo Nakayama , Kazuomi Endo
- 申请人: Yuji Ando , Takashi Inoue , Kazuki Ota , Yasuhiro Okamoto , Tatsuo Nakayama , Kazuomi Endo
- 申请人地址: JP Tokyo
- 专利权人: NEC Corporation
- 当前专利权人: NEC Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: JP2010-073879 20100326
- 国际申请: PCT/JP2010/072590 WO 20101215
- 国际公布: WO2011/118098 WO 20110929
- 主分类号: H01L29/778
- IPC分类号: H01L29/778 ; H01L21/8252 ; H01L29/78 ; H01L29/20 ; H01L29/423 ; H01L29/66
摘要:
The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer 112, a channel layer 113, a barrier layer 114, and a spacer layer 115 is formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer 112, the channel layer 113 having a compressive strain, and the barrier layer 114 having a tensile strain, and the spacer layer 115 having a compressive strain are laminated on a substrate 100 in this order. The gate insulating film 14 is arranged on the spacer layer 115. The gate electrode 15 is arranged on the gate insulating film 14. The source electrode 161 and the drain electrode 162 are electrically connected to the channel layer 113 directly or via another component.
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