发明授权
US08924761B2 Data processor and data processing system 有权
数据处理器和数据处理系统

Data processor and data processing system
摘要:
A reset controller is adopted which performs control for causing an external reset terminal to be shared for external output of a reset signal and input of a reset signal from outside, allowing a reset input from the external reset terminal in a state in which a power supply voltage is stable, and causing, when a reset factor due to turn-on of a power supply voltage or a reduction in the level of the power supply voltage is detected by a detection circuit, an input/output buffer to output a reset signal to the external reset terminal and masking the inflow of the reset signal from the input/output buffer to its input path, using a signal detected by the detection circuit. A mask period is assumed to be a period longer than a period from reset instructions to a reset release.
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