Invention Grant
US08928350B2 Programming the behavior of individual chips or strata in a 3D stack of integrated circuits
有权
对集成电路的3D堆叠中的单个芯片或层的行为进行编程
- Patent Title: Programming the behavior of individual chips or strata in a 3D stack of integrated circuits
- Patent Title (中): 对集成电路的3D堆叠中的单个芯片或层的行为进行编程
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Application No.: US13607020Application Date: 2012-09-07
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Publication No.: US08928350B2Publication Date: 2015-01-06
- Inventor: Liang-Teck Pang , Joel A. Silberman , Matthew R. Wordeman
- Applicant: Liang-Teck Pang , Joel A. Silberman , Matthew R. Wordeman
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Louis J. Percello
- Main IPC: H03K19/173
- IPC: H03K19/173 ; G01R31/3185 ; H01L25/065
Abstract:
There is provided a strata manager within a 3D chip stack having two or more strata. The strata manager includes a plurality of scannable configuration registers, each being arranged on a respective one of the two or more strata for storing a set of bits. The set of bits is configured to program an operation of a corresponding one of the two or more strata on which the set of bits is stored or a device thereon. Additionally, a stratum identifier within a 3D stack and stack-wide scan circuit within a 3D stack are provided.
Public/Granted literature
- US20130049796A1 PROGRAMMING THE BEHAVIOR OF INDIVIDUAL CHIPS OR STRATA IN A 3D STACK OF INTEGRATED CIRCUITS Public/Granted day:2013-02-28
Information query
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