Invention Grant
US08933747B2 Semiconductor chip package including voltage generation circuit with reduced power noise 有权
半导体芯片封装包括具有降低功耗噪声的电压发生电路

Semiconductor chip package including voltage generation circuit with reduced power noise
Abstract:
A semiconductor chip package eliminates and minimizes a power noise generated from a voltage generation circuit in the semiconductor chip package includes an integrated circuit chip with a voltage generation circuit that receives an external voltage to generate a supply voltage to be used in an internal circuit and a connection terminal connected to an output node of the voltage generation circuit, and a mounting substrate including a noise eliminator electrically connected to the connection terminal to reduce a power noise of the supply voltage and a mounting substrate to mount the integrated circuit chip to package the integrated circuit chip as the semiconductor chip package.
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