发明授权
US08936977B2 Late in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations
有权
在28nm低功率/高性能技术上使用硅氧化物封装，早期晕圈和延伸注入的PMOS器件的晚期原位掺杂SiGe结
- 专利标题： Late in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations
- 专利标题（中）： 在28nm低功率/高性能技术上使用硅氧化物封装，早期晕圈和延伸注入的PMOS器件的晚期原位掺杂SiGe结
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申请号： US13482393申请日： 2012-05-29
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公开(公告)号： US08936977B2公开(公告)日： 2015-01-20
- 发明人: Jan Hoentschel , Shiang Yang Ong , Stefan Flachowsky , Thilo Scheiper
- 申请人： Jan Hoentschel , Shiang Yang Ong , Stefan Flachowsky , Thilo Scheiper
- 申请人地址： SG Singapore
- 专利权人： GlobalFoundries Singapore Pte. Ltd.
- 当前专利权人： GlobalFoundries Singapore Pte. Ltd.
- 当前专利权人地址： SG Singapore
- 代理机构： Ditthavong & Steiner, P.C.
- 主分类号： H01L21/338
- IPC分类号： H01L21/338
摘要：
A HKMG device with PMOS eSiGe source/drain regions is provided. Embodiments include forming first and second HKMG gate stacks on a substrate, forming a nitride liner and oxide spacers on each side of each HKMG gate stack, performing halo/extension implants at each side of each HKMG gate stack, forming an oxide liner and nitride spacers on the oxide spacers of each HKMG gate stack, forming deep source/drain regions at opposite sides of the second HKMG gate stack, forming an oxide hardmask over the second HKMG gate stack, forming embedded silicon germanium (eSiGe) at opposite sides of the first HKMG gate stack, and removing the oxide hardmask.
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