Invention Grant
US08954767B2 Standby current reduction through a switching arrangement with multiple regulators
有权
通过具有多个调节器的开关装置的待机电流降低
- Patent Title: Standby current reduction through a switching arrangement with multiple regulators
- Patent Title (中): 通过具有多个调节器的开关装置的待机电流降低
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Application No.: US13888099Application Date: 2013-05-06
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Publication No.: US08954767B2Publication Date: 2015-02-10
- Inventor: Andre Gunther , Kevin Mahooti , Meng Hao
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/32 ; G05F1/56 ; H02M3/156

Abstract:
Consistent with an example embodiment, there is a power regulator arrangement with variable current capacity providing power from a power supply to a load having variable demand. As a load, a high-performance microprocessor has several modes of operation. At the highest speed setting, it demands a lot of current. At slower clock speeds and during state retention, the processor has a very low current consumption. Using a single regulator, the current efficiency may be very low during long standby periods. To increase the efficiency even at lower load currents, a scheme is based on parallel operation of multiple regulators having different load ranges, for example, a “low, “medium,” and “high” range regulators. Having knowledge of the load current profile, the regulators can be adjusted such that the peak of the efficiency curve matches the load profile of the regulator. The efficiency of the power regulator arrangement is enhanced throughout the range of power demanded by the load.
Public/Granted literature
- US20140149764A1 STANDBY CURRENT REDUCTION THROUGH A SWITCHING ARRANGEMENT WITH MULTIPLE REGULATORS Public/Granted day:2014-05-29
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