A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period.