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1.发明授权公开(公告)号：US09354647B2
公开(公告)日：2016-05-31
申请号：US14444185
申请日：2014-07-28
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Bo-Yeon Kim , Hee-Sun Ahn
CPC classification number: G05F1/561 , G05F3/26 , H02M3/137 , H02M3/156 , H02M2003/1555
Abstract: A current generating circuit includes a reference voltage generating unit, a clock signal generating unit, a reference current generating unit, and a current mirror unit. The reference voltage generating unit generates a first reference voltage and a second reference voltage. The clock signal generating unit generates clock signals. The reference current generating unit generates a reference current corresponding to a selection signal based on the first reference voltage. The current mirror unit supplies a first current and a second current based on the reference current. A capacitor charges voltage based on the second current. A selection signal generating unit counts clock signals during a period in which a voltage charged in the capacitor is less than the second reference voltage, and outputs the selection signal based on the counted result.
Abstract translation: 电流产生电路包括参考电压产生单元，时钟信号产生单元，参考电流产生单元和电流反射镜单元。 参考电压产生单元产生第一参考电压和第二参考电压。 时钟信号产生单元产生时钟信号。 参考电流产生单元基于第一参考电压产生与选择信号相对应的参考电流。 电流镜单元基于参考电流提供第一电流和第二电流。 电容器根据第二电流对电压进行充电。 选择信号生成单元在电容器中充电的电压小于第二基准电压的期间对时钟信号进行计数，并根据计数结果输出选择信号。
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公开(公告)号：US09779665B2
公开(公告)日：2017-10-03
申请号：US14836796
申请日：2015-08-26
Applicant: Samsung Display Co., Ltd.
Inventor： Jun-Yong Song , Oh-Jo Kwon , Ji-Woong Kim , Choong-Sun Shin , Hee-Sun Ahn
IPC: G09G3/3266 , G09G3/3233
CPC classification number: G09G3/3266 , G09G3/3233 , G09G2300/0819 , G09G2320/0233 , G09G2320/0285 , G09G2320/0295 , G09G2320/045
Abstract: A gate driver for a display device and a display device including the same are disclosed. In one aspect, the gate driver includes first through N-th scan drivers configured to respectively output first through N-th scan signals, where N is an integer greater than 1. The gate driver also includes first through N-th sensing drivers configured to respectively output first through N-th sensing signals, wherein an M-th one of the first through N-th sensing drivers is configured to activate an M-th one of the first through N-th sensing signals K times during an active period of an (M+1)-th one of the first through N-th scan signals, where M is an integer greater than 0 and less than N and K is an integer greater than 1.
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3.发明申请公开(公告)号：US20160240144A1
公开(公告)日：2016-08-18
申请号：US14836796
申请日：2015-08-26
Applicant: Samsung Display Co., Ltd.
Inventor： Jun-Yong Song , Oh-Jo Kwon , Ji-Woong Kim , Choong-Sun Shin , Hee-Sun Ahn
IPC: G09G3/32
CPC classification number: G09G3/3266 , G09G3/3233 , G09G2300/0819 , G09G2320/0233 , G09G2320/0285 , G09G2320/0295 , G09G2320/045
Abstract: A gate driver for a display device and a display device including the same are disclosed. In one aspect, the gate driver includes first through N-th scan drivers configured to respectively output first through N-th scan signals, where N is an integer greater than 1. The gate driver also includes first through N-th sensing drivers configured to respectively output first through N-th sensing signals, wherein an M-th one of the first through N-th sensing drivers is configured to activate an M-th one of the first through N-th sensing signals K times during an active period of an (M+1)-th one of the first through N-th scan signals, where M is an integer greater than 0 and less than N and K is an integer greater than 1.
Abstract translation: 公开了一种用于显示装置的栅极驱动器和包括其的显示装置。 一方面，栅极驱动器包括配置成分别输出第一至第N扫描信号的第一至第N扫描驱动器，其中N是大于1的整数。栅极驱动器还包括第一至第N检测驱动器，其被配置为 分别输出第一至第N感测信号，其中第一至第N感测驱动器中的第M个被配置为在第一至第N感测驱动器的有效时段期间激活第一至第N感测信号中的第M个K次 第一至第N扫描信号中的第（M + 1）个第一个，其中M是大于0且小于N的整数，K是大于1的整数。
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4.发明授权Current memory cell and a current mode digital-to-analog converter including the same 有权当前存储单元和包括其的电流模式数模转换器公开(公告)号：US08957799B1
公开(公告)日：2015-02-17
申请号：US14207820
申请日：2014-03-13
Applicant: Samsung Display Co., Ltd.
Inventor： Bo-Yeon Kim , Oh-Jo Kwon , Hee-Sun Ahn , Won-Tae Choi
IPC: H03M1/66 , G11C11/406
CPC classification number: G11C11/40615 , G11C27/024 , G11C27/026 , G11C27/028 , H03M1/742
Abstract: A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period.
Abstract translation: 当前存储单元包括放大器，晶体管，第一和第二电容器以及第一至第三开关单元。 放大器包括第一至第三端子。 晶体管耦合到第一和第二节点并接地。 第一电容器耦合在第二节点和地之间。 第二电容器耦合在第三节点和地之间。 第一单元在第一周期期间将电流源耦合到第一节点，在第二周期期间将输出线耦合到第一节点。 第一单元在第一周期期间将第一节点耦合到第二节点。 第三单元将第一终端耦合到第二节点，并且在第一周期期间将第二和第三终端耦合到第三节点，并且将第一终端耦合到第三节点，并且在第二周期期间将第二和第三终端耦合到第二节点 期。
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5.发明申请公开(公告)号：US20140269782A1
公开(公告)日：2014-09-18
申请号：US14207447
申请日：2014-03-12
Applicant: Samsung Display Co., Ltd.
Inventor： Hee-Sun Ahn , Jae-Goo Lee , Choong-Sun Shin , Young-Uk Won , In-Bok Song
CPC classification number: H04L7/0016 , H04L7/0008 , H04L25/14
Abstract: An apparatus for compensating for a skew is provided between data signals supplied through a plurality of data lines and a clock signal supplied through a clock line. A skew compensation apparatus includes a plurality of data receivers each configured to delay a data signal supplied through a corresponding data line based on associated phase difference data and to output the delayed data signal, a clock receiver configured to receive a clock signal supplied through a clock line, and a phase controller configured to select any one of the plurality of data receivers and to output, to the selected data receiver, a phase control signal configured to correct the phase difference data of the selected data receiver based on the phase difference between a data signal output from the selected data receiver and the clock signal.
Abstract translation: 在通过多条数据线提供的数据信号和通过时钟线提供的时钟信号之间提供用于补偿偏斜的装置。 偏斜补偿装置包括多个数据接收器，每个数据接收器被配置为基于相关联的相位差数据延迟通过对应的数据线提供的数据信号并输出延迟的数据信号;时钟接收器，被配置为接收通过时钟提供的时钟信号 线路和相位控制器，其被配置为选择所述多个数据接收器中的任何一个，并且向所选数据接收器输出相位控制信号，所述相位控制信号被配置为基于所述数据接收器的相位差来校正所选数据接收器的相位差数据 从所选数据接收机输出的数据信号和时钟信号。
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Patent Agency Ranking
公开(公告)号：US09691329B2
公开(公告)日：2017-06-27
申请号：US13929722
申请日：2013-06-27
Inventor： Oh-Jo Kwon , Won-Tae Choi , Hee-Sun Ahn , Bo-Yeon Kim , Gyu-Hyeong Cho , Hyun-Sik Kim , Jun-Suk Bang
IPC: G09G3/30 , G09G3/3291 , G09G3/3233
CPC classification number: G09G3/3291 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/0295 , G09G2320/045 , G09G2320/0693
Abstract: An organic light emitting display device includes pixels positioned at crossing regions between data lines and scan lines, each of the pixels including an organic light emitting diode, a scan driver configured to supply a scan signal to scan lines, a data driver configured to drive the data lines, wherein the data driver includes, in each channel, a supply part comprising a digital-to-analog converter configured to generate data signals using second data supplied from outside in a driving period, and a deterioration part configured to measure deterioration information of the organic light emitting diode using the digital-to-analog converter in a sensing period.
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7.发明授权公开(公告)号：US09485081B2
公开(公告)日：2016-11-01
申请号：US14207447
申请日：2014-03-12
Applicant: Samsung Display Co., Ltd.
Inventor： Hee-Sun Ahn , Jae-Goo Lee , Choong-Sun Shin , Young-Uk Won , In-Bok Song
CPC classification number: H04L7/0016 , H04L7/0008 , H04L25/14
Abstract: An apparatus for compensating for a skew is provided between data signals supplied through a plurality of data lines and a clock signal supplied through a clock line. A skew compensation apparatus includes a plurality of data receivers each configured to delay a data signal supplied through a corresponding data line based on associated phase difference data and to output the delayed data signal, a clock receiver configured to receive a clock signal supplied through a clock line, and a phase controller configured to select any one of the plurality of data receivers and to output, to the selected data receiver, a phase control signal configured to correct the phase difference data of the selected data receiver based on the phase difference between a data signal output from the selected data receiver and the clock signal.
Abstract translation: 在通过多条数据线提供的数据信号和通过时钟线提供的时钟信号之间提供用于补偿偏斜的装置。 偏斜补偿装置包括多个数据接收器，每个数据接收器被配置为基于相关联的相位差数据延迟通过对应的数据线提供的数据信号并输出延迟的数据信号;时钟接收器，被配置为接收通过时钟提供的时钟信号 线路和相位控制器，其被配置为选择所述多个数据接收器中的任何一个，并且向所选数据接收器输出相位控制信号，所述相位控制信号被配置为基于所述数据接收器的相位差来校正所选数据接收器的相位差数据 从所选数据接收机输出的数据信号和时钟信号。
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公开(公告)号：US09450567B2
公开(公告)日：2016-09-20
申请号：US14458167
申请日：2014-08-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Oh-Jo Kwon , Boo-Dong Kwak , Choong-Sun Shin , Hee-Sun Ahn
CPC classification number: H03H19/004 , G09G3/3233 , G09G3/3258 , G09G3/3291
Abstract: A noise-removing circuit includes a first capacitor to charge a first voltage supplied to a first node during a first period in which a first switching control signal is supplied, a second capacitor to charge a second voltage supplied to a third node during the first period, a third capacitor to charge the first voltage during a second period in which a second switching control signal is supplied, and to charge the second voltage charged in the second capacitor as a third voltage during a third period in which a third switching control signal is supplied, a fourth capacitor to charge the second voltage during the second period, and to charge the first voltage charged in the first capacitor as a fourth voltage during the third period, and a differential amplifier to output a voltage difference between the third voltage and the fourth voltage.
Abstract translation: 噪声消除电路包括：第一电容器，用于在提供第一开关控制信号的第一周期期间对提供给第一节点的第一电压充电;第二电容器，用于在第一周期期间对提供给第三节点的第二电压充电 在供给第二开关控制信号的第二期间对第一电压进行充电的第三电容器，在第三开关控制信号为第三时间段期间，将充电在第二电容器中的第二电压充电为第三电压作为第三电压 提供第四电容器，用于在第二周期期间对第二电压进行充电，并且在第三周期期间将充电在第一电容器中的第一电压充电为第四电压;差分放大器，用于输出第三电压和第三电压之间的电压差 第四电压。
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9.发明授权公开(公告)号：US09424770B2
公开(公告)日：2016-08-23
申请号：US13941356
申请日：2013-07-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Bo-Yeon Kim , Oh-Jo Kwon , Hee-Sun Ahn
CPC classification number: G09G3/3208 , G09G3/3233 , G09G3/3291 , G09G2300/0842 , G09G2320/0295 , G09G2320/043 , G09G2320/045 , H03K17/30
Abstract: An error compensator and an organic light emitting display device using the same. The organic light emitting display device includes pixels each having a driving transistor and an organic light emitting diode; and a sensing unit extracting at least one of a first information including the threshold voltage of the driving transistor or a second information including the degradation of the organic light emitting diode from a pixel of the pixels. In the organic light emitting display device, the sensing unit includes an amplifier amplifying a voltage corresponding to the at least one of the first information or the second information; and an error compensator compensating for error components of elements included in the amplifier and the error compensator.
Abstract translation: 误差补偿器和使用其的有机发光显示装置。 有机发光显示装置包括各自具有驱动晶体管和有机发光二极管的像素; 以及感测单元，从像素的像素中提取包括驱动晶体管的阈值电压的第一信息或包括有机发光二极管的劣化的第二信息中的至少一个。 在有机发光显示装置中，感测单元包括放大对应于第一信息或第二信息中的至少一个的电压的放大器; 以及补偿放大器和误差补偿器中包括的元件的误差分量的误差补偿器。
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10.发明申请CURRENT MEMORY CELL AND A CURRENT MODE DIGITAL-TO-ANALOG CONVERTER INCLUDING THE SAME 有权电流存储单元和包括其的电流模数转换器公开(公告)号：US20150054666A1
公开(公告)日：2015-02-26
申请号：US14207820
申请日：2014-03-13
Applicant: Samsung Display Co., Ltd.
Inventor： Bo-Yeon Kim , Oh-Jo Kwon , Hee-Sun Ahn , Won-Tae Choi
IPC: G11C11/406 , H03M1/66
CPC classification number: G11C11/40615 , G11C27/024 , G11C27/026 , G11C27/028 , H03M1/742
Abstract: A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period.
Abstract translation: 当前存储单元包括放大器，晶体管，第一和第二电容器以及第一至第三开关单元。 放大器包括第一至第三端子。 晶体管耦合到第一和第二节点并接地。 第一电容器耦合在第二节点和地之间。 第二电容器耦合在第三节点和地之间。 第一单元在第一周期期间将电流源耦合到第一节点，在第二周期期间将输出线耦合到第一节点。 第一单元在第一周期期间将第一节点耦合到第二节点。 第三单元将第一终端耦合到第二节点，并且在第一周期期间将第二和第三终端耦合到第三节点，并且将第一终端耦合到第三节点，并且在第二周期期间将第二和第三终端耦合到第二节点 期。
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